SPI CS not toggled during transfer

RE: SPI CS not toggled during transfer

Jorge — Thu, 30 Jun 2016 12:51:52 GMT

I was using an example code from other company and they had cleared the cs pin on a interrupt. This was causing it to be cleared right after I tried to initiate a spi transfer.

RE: SPI CS not toggled during transfer

Jorge — Fri, 24 Jun 2016 11:07:14 GMT

the problem is it is like only a moment. and not the duration of my clock. I'll try to see my code, maybe I have a nrf_gpio_pin_set(p_cb->ss_pin); somewhere defined that is setting high the pin. thank you for the help

RE: SPI CS not toggled during transfer

RK — Fri, 24 Jun 2016 11:03:21 GMT

well that code looks fine - it clears the pin at the start of the transaction and sets it again at the end, which is what it ought to do. It's going to bounce pretty quickly between the two states because the transfers aren't very long.

RE: SPI CS not toggled during transfer

Jorge — Fri, 24 Jun 2016 09:28:01 GMT

The code I putted is not as it is on the SDK, I have first the code you putted and after, on the end of the transfer, with the same code but with the set of the pin. the "/" represented that I have the two codes but with that difference. I will change on the question.

RE: SPI CS not toggled during transfer

RK — Fri, 24 Jun 2016 09:25:13 GMT

Where is this code you're seeing, because I'm looking at the driver in my directory and it correctly clears the pin

if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED)
{
    nrf_gpio_pin_clear(p_cb->ss_pin);
}

I don't see a line like you have above, it looks to me like the clear, which is correct, was commented out and replaced with a set.

So what exact line of what file are you looking at and you might want to redownload the SDK and check the code didn't get changed by mistake.

RE: SPI CS not toggled during transfer

Jorge — Fri, 24 Jun 2016 09:17:33 GMT

The pin selected now it's the pin 3, but I already tried others with same results. What happens is that the CS pin just goes low and goes back to high right after. So my slave can't send or receive anything because the CS is always high when the CLK is active. I can't debug on the nRF side because I need an external supply of 2 V to be able to connect to the other board. So I'm measuring the signals with an oscilloscope and there I can see that the behavior of the CS pin isn't correct. Can't understand why is not clearing the CS pin for the duration of the CLK.

RE: SPI CS not toggled during transfer

RK — Fri, 24 Jun 2016 09:10:03 GMT

Do you need to change what? 0xFF is the correct define for an unused pin (unused pins in registers are usually 0xFFFFFFFF so this is just the last 8 bits). What do you have your ss_pin configured to, if it's not 0xFF then that piece of code will be executed and the pin will toggle low. What are you seeing different?