<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/14747/i2s-sclk-and-lrck-nrf52832-dk</link><description>Any updates on this from anyone? Please advise 
 Hi, 
 The i2S microphone that I am using requires a over sampling rate fixed at 64 therefore the WS signal (LRCLK on nrf52) must be BCLK/64 and therefore synchronized to the BCLK (SCLK on nrf52). This</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 15 Sep 2017 15:02:22 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/14747/i2s-sclk-and-lrck-nrf52832-dk" /><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56314?ContentTypeID=1</link><pubDate>Fri, 15 Sep 2017 15:02:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:577ca7e0-ee6e-46ac-b55c-f2f7e1c26b0f</guid><dc:creator>Greg Tomasch</dc:creator><description>&lt;p&gt;Hello All,&lt;/p&gt;
&lt;p&gt;I think there is a work-around of sorts now that addresses the issues experienced here... Almost all 24-bit I2S microphones output 24 data bits per stereo channel but require 32 SCK pulses per channel to function properly. So, the stereo I2S frame needs to be 64 SCK pulses wide. Like everyone else, I was attempting to collect audio data from a modern 24-bit I2S MEMS microphone and ran into the hard-coded limitation of 48 SCK pulses per stereo I2S frame in I2S master mode. The I2S frame will never be 64 SCK pulses wide In master mode but in I2S slave mode the nRF52 will properly decode the 24 data bits per channel even if the the frame is 64 SCK pulses wide. After reading the I2S protocol spec, It dawned on me that there really is precious little difference between I2S master and slave modes... Just where the LRCK and SCK pulses come from.&lt;/p&gt;
&lt;p&gt;My solution was to augment the PWM library to set the PWM carrier period directly in 16MHz ticks, not milliseconds. So I use two PWM channels; one to generate SCK and the other to generate LRCK and connect the PWM outputs to the I2S SCK and LRCK pins. I set the LRCK PWM channel period to be 64X that of the SCK PWM chanel period. I have a functioning peripheral application for SDK 13.0.0 and the pca10040 DK board located here:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/gregtomasch/nRF52_24-bit-_I2S_Microphone_Audio_Recording_Utility"&gt;github.com/.../nRF52_24-bit-_I2S_Microphone_Audio_Recording_Utility&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;I was using the Invensense ICS43432 microphone. There is a sample &amp;quot;.wav&amp;quot; audio file that demonstrates typical audio quality....&lt;/p&gt;
&lt;p&gt;This may be considered as an ugly work-around but it does work and doesn&amp;#39;t require any other external devices to generate the clock signals...&lt;/p&gt;
&lt;p&gt;Best Regards, Greg Tomasch&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56313?ContentTypeID=1</link><pubDate>Thu, 16 Mar 2017 12:33:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:31a194ff-79e3-47c8-94ce-3a260321dd8c</guid><dc:creator>Morten</dc:creator><description>&lt;p&gt;Possible duplicate of &lt;a href="https://devzone.nordicsemi.com/question/66317/i2s-unable-to-generate-mck-and-sck-on-nrf-52-board/"&gt;this question&lt;/a&gt;?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56312?ContentTypeID=1</link><pubDate>Wed, 29 Jun 2016 13:17:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ff557938-0f90-454f-bba1-b459f9ba8013</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;You could try, but the way I read the datasheet the microphone demands a resolution of 24 bits. If it sends  24 bits and we try to receive 16 we might end up with scrambeled data.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56311?ContentTypeID=1</link><pubDate>Wed, 29 Jun 2016 11:32:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9f7ce658-81f5-4915-9919-e5a65216784c</guid><dc:creator>worldsnexthero</dc:creator><description>&lt;p&gt;Now that we are on the same page, I was wondering if I could program the following:
LRCLK = MCLK/RATIO_64 and
MCLK = 4MHZ setting
Send MCLK as bit serial clock to microphone. This way we get the 64 ratio. But in order to use 64 ratio we have to pick a CONFIG.SWIDTH that 64 is a multiple of.&lt;/p&gt;
&lt;p&gt;Thus,  CONFIG.SWIDTH is set to 16 bit because 16 and 24 bit are just resolution settings correct? So we can just use 16 bit for a smaller resolution.&lt;/p&gt;
&lt;p&gt;with CONFIG.SWIDTH set at 16, RATIO_64/(2*16) = INTEGER and we also obtain the 64 ratio. Does that look okay to you?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56310?ContentTypeID=1</link><pubDate>Wed, 29 Jun 2016 07:18:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:bc62e6a6-5121-4dbc-a260-d8e707afac3d</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;Since the device transmits 24 bits the master must also have a swidth of 24 as that defines the number of bits the master gets.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56309?ContentTypeID=1</link><pubDate>Tue, 28 Jun 2016 14:15:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fbc10c8a-52aa-4f02-9de7-f9fd2b0f2db2</guid><dc:creator>worldsnexthero</dc:creator><description>&lt;p&gt;Based on the vendor,  the microphone has been used before with nordic. Perhaps the CONFIG.SWIDTH that I&amp;#39;m using is incorrect.  They let me know that:&lt;/p&gt;
&lt;p&gt;&amp;quot;WS should be derived from BCLK, and the mic expects to occupy 32 bits (one WS phase) for every 64 clocks (there could be a stereo pair, each occupying a different 32 bits depending on the Select line). Reminder that WS is LRCK and BCK is SCK.&amp;quot;&lt;/p&gt;
&lt;p&gt;I have used a 24bit SWIDTH. Based on their response above and the datasheet,  do you have any suggestion for the SWIDTH?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56308?ContentTypeID=1</link><pubDate>Tue, 28 Jun 2016 10:28:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0bdcca74-2c0b-41c7-a67d-b78571e6f3a7</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;You could try to configure the I2S to give a MCK of ~0.5 MHz and see if it works, however they say in the datasheet that it is not supported. If that does not work you will have to look into a different mic. You could also try contacting their customer service.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56307?ContentTypeID=1</link><pubDate>Tue, 28 Jun 2016 10:18:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3ccc0d22-d740-4383-aa12-2cc52af4bedf</guid><dc:creator>worldsnexthero</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/SPH0645LM4H_2D00_BRevB.PDF"&gt;SPH0645LM4H-BRevB.PDF&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;I have added the attachment for your reference.  Thanks for letting me know about the ratio.  Based on the datasheet how does the main.c file look that I attached in earlier answers?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56306?ContentTypeID=1</link><pubDate>Tue, 28 Jun 2016 07:15:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4310341b-c7eb-4e59-89a6-6c57a3b95b3d</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;Unfortunately getting SCK/64 with frequencies between 2 and 4 MHz is not supported.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56304?ContentTypeID=1</link><pubDate>Tue, 28 Jun 2016 06:48:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:edf1bd6e-4959-405b-95c2-e3a80e69a892</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;For reference, do you have the datasheet for your microphone?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56305?ContentTypeID=1</link><pubDate>Mon, 27 Jun 2016 23:18:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a733e9db-ac83-4f34-bc78-09fc0829a119</guid><dc:creator>worldsnexthero</dc:creator><description>&lt;p&gt;The i2s digital microphone asks for a WS (LRCLK) which is BCLK/64 (SCK/64).&lt;/p&gt;
&lt;p&gt;If we obtain a LRCLK of 42kHz and  SCK of 2.048MHz, the ratio of SCK with LRCLK is 2.048MHz/42kHz = ~48. It seems like it would be impossible to obtain that 64 ratio is that correct?&lt;/p&gt;
&lt;p&gt;I also have uploaded the C file for the microphone. Does it seem correct?&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/1641.main.c"&gt;main.c&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Thanks.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: i2S SCLK and LRCK nRF52832 DK</title><link>https://devzone.nordicsemi.com/thread/56303?ContentTypeID=1</link><pubDate>Mon, 27 Jun 2016 12:26:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ff42513f-8dc2-47e3-9c17-501799502315</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Note that the specification is only valid up to 4 MHz MCK, so lets chose that for simplicity, ie. CONFIG.MCKFREQ 32MDIV8. You also have SWIDTH set to 24 bit, so we chose the ratio that gives an integer and fulfills your specification, ie. CONFIG.RATIO 96X. This way we get a LRCLK of ~42 kHz and an SCK of 2.048 MHz.&lt;/p&gt;
&lt;p&gt;Does this not work for you?&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Øyvind&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>