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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52832 DCDC errata on various silicon</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/15632/nrf52832-dcdc-errata-on-various-silicon</link><description>Hi, 
 I have a couple of eval boards that were created for software and hardware development. We have two versions of the nRF52832 on these development boards. I know that there is an errata regarding the DCDC enable on revision A and B of the silicon</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 09 Aug 2016 10:59:04 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/15632/nrf52832-dcdc-errata-on-various-silicon" /><item><title>RE: nRF52832 DCDC errata on various silicon</title><link>https://devzone.nordicsemi.com/thread/59680?ContentTypeID=1</link><pubDate>Tue, 09 Aug 2016 10:59:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:da223eba-eec8-4601-8181-b83dcc3970f3</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;The DC/DC converter is not enabeled by default. Set it by using the function &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.s132.api.v2.0.0/group___n_r_f___s_o_c___f_u_n_c_t_i_o_n_s.html#ga84bd6a0e8f55a7aa85a5ec608edd61fe"&gt;sd_power_dcdc_mode_set()&lt;/a&gt;. This will dynamically turn on and off the DCDC depending on current draw scenarios.&lt;/p&gt;
&lt;p&gt;DC/DC is only efficient when a large enough amount of current is drawn, therefore the chip switches between the most efficient solution, ie. LDO or DC/DC.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 DCDC errata on various silicon</title><link>https://devzone.nordicsemi.com/thread/59679?ContentTypeID=1</link><pubDate>Tue, 09 Aug 2016 10:45:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1ebc5917-b946-4bad-a102-a7ebdfb62375</guid><dc:creator>rugarcia</dc:creator><description>&lt;p&gt;Do I need to explicitly enable the DCDC converter or is automatically enabled when I initialize the soft device. Is the call to &amp;quot;sd_app_evt_wait()&amp;quot; sufficient to disable the DCDC converter based on the fact that the errata no longer applies?&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Rudy&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 DCDC errata on various silicon</title><link>https://devzone.nordicsemi.com/thread/59678?ContentTypeID=1</link><pubDate>Tue, 09 Aug 2016 06:29:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6ea5ab87-1df0-4a6a-bd2d-3353052ddd40</guid><dc:creator>&amp;#216;yvind Karlsen</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Item 1 should be engineering C, item 2 should be revision 1. This means that you should not have to apply the errata 63 for DCDC. You can refer to the &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52/dita/nrf52/compatibility_matrix/ic_revision_overview.html?cp=2_1_0"&gt;compatibility matrix&lt;/a&gt; to decode chip revisions.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Øyvind&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>