NVIC does not tail-chain to PendSV ISR

RE: NVIC does not tail-chain to PendSV ISR

fluent — Thu, 15 Sep 2016 21:11:31 GMT

Great, thanks!

RE: NVIC does not tail-chain to PendSV ISR

Susheel Nuguru — Thu, 15 Sep 2016 13:30:41 GMT

This is how i verified it.

   void PendSV_Handler(void)
    {
          volatile register uint32_t r0 __asm("r0");
          volatile register uint32_t r1 __asm("r1");
          printf("PendSV %x\n\r",r0);
          printf("PendSV %x\n\r",r1);
    }

void TIMER1_IRQHandler(void)
{
     volatile register uint32_t r0 __asm("r0");
     volatile register uint32_t r1 __asm("r1");
    
    printf("Timer1 %x\n\r",r0);
    printf("Timer1 %x\n\r",r1);
    
    
    NRF_TIMER1->INTENSET = 0;
    NVIC_DisableIRQ(TIMER1_IRQn);
    NVIC_ClearPendingIRQ(TIMER1_IRQn);

    SCB->ICSR = SCB->ICSR | SCB_ICSR_PENDSVSET_Msk;

    int i = 0xFFFF;
    while(i--);  

    __asm("mov r0, #0xbeef");
    __asm("mov r1, #0xdead");
}



/**
 * @brief Function for main application entry.
 */
int main(void)
{
    uint32_t err_code;

    simple_uart_config(0, TX_PIN_NUMBER, 0, RTS_PIN_NUMBER, false); // Hardware flow control not used in this example.
      
    printf("\n\rStart: \n\r");

    NVIC_SetPriority(TIMER1_IRQn, 2);
    NVIC_EnableIRQ(TIMER1_IRQn);
    NVIC_SetPriority(PendSV_IRQn, 0xFF);
    NVIC_EnableIRQ(PendSV_IRQn);
    NVIC_SetPendingIRQ(TIMER1_IRQn);
      
    while(1);
}

I set 0xdeadbeef in R0 and R1 in the end of Timer1 ISR and i see that they retain on entry to PendSV, this can only happen with tail chaining

OUTPUT

Start:
Timer1 0
Timer1 e000e200
PendSV beef
PendSV dead

RE: NVIC does not tail-chain to PendSV ISR

Susheel Nuguru — Thu, 15 Sep 2016 08:18:15 GMT

yes, one more time , mislead by the debugger's inability to show us exactly what is happening under the hood.

RE: NVIC does not tail-chain to PendSV ISR

fluent — Thu, 15 Sep 2016 00:45:21 GMT

Thanks again, Aryan! I'm still having problems completing my context switch without hard-faulting, but it does look like tail-chaining is fine and my problems lie somewhere else.

Still interested in hearing about how you were able to confirm tail-chaining on your end.

RE: NVIC does not tail-chain to PendSV ISR

fluent — Thu, 15 Sep 2016 00:43:04 GMT

Then I rebuild the program and in the PendSV exception handler I PUSH {R0, LR} then call a function which also enters a while (true) loop. And the stack looks like this:

0x2000fe88: 0x2000feb8  0x0002e10d  0x00000038  0xfffffff9
0x2000fe98: 0x20007899  0x00000000  0x00000000  0x20007899
0x2000fea8: 0x000007ff  0x000266bf  0x00026404  0x21000000
0x2000feb8: 0x00000000  0x20007b40  0x00000000  0x00000000
0x2000fec8: 0x20007bbc  0x0000eb04  0x00000001  0x00000000
0x2000fed8: 0x0000eb04  0x00000001  0x20007b98  0x20007c3c
0x2000fee8: 0x2000ff08  0x00024b0d  0x20007b98  0x00000000
0x2000fef8: 0x20007898  0x20007899  0x00000001  0x00000002

Now those two words at the top of the previous stack have been replaced by four words - 2 from the PendSV handler and 2 from my C function.

RE: NVIC does not tail-chain to PendSV ISR

fluent — Thu, 15 Sep 2016 00:40:25 GMT

I think you're right. I placed a while (true) continue in the first exception handler and this is what the stack looks like:

0x2000fe90: 0x2000feb8  0xfffffff9  0x20007899  0x00000000
0x2000fea0: 0x00000000  0x20007899  0x000007ff  0x000266bf
0x2000feb0: 0x00026404  0x21000000  0x00000000  0x20007b40
0x2000fec0: 0x00000000  0x00000000  0x20007bbc  0x0000eb04
0x2000fed0: 0x00000001  0x00000000  0x0000eb04  0x00000001
0x2000fee0: 0x20007b98  0x20007c3c  0x2000ff08  0x00024b0d
0x2000fef0: 0x20007b98  0x00000000  0x20007898  0x20007899
0x2000ff00: 0x00000001  0x00000002  0x00000000  0x20007798

The two words at the top of the stack were pushed by the exception handler.

RE: NVIC does not tail-chain to PendSV ISR

Susheel Nuguru — Wed, 14 Sep 2016 15:14:58 GMT

There is tail chaining happening. Debugger breakpoints is just messing up the timings. I'll show you tomorrow how i verified, now im already home and typing on phone is not very effective.

RE: NVIC does not tail-chain to PendSV ISR

fluent — Wed, 14 Sep 2016 01:34:55 GMT

Thanks, Aryan, for replicating the problem and responding here. I was wondering the same thing, if the debugger (I'm using GDB) is unable to monitor tail-chaining as it happens. I was thinking of setting a breakpoint in the PendSV handler, running to the breakpoint and comparing the stack to what I think it should be. Alternatively, I could try printing and comparing the value of the stack pointer (MSP) in both exception handlers. I'll let you know what I find.

RE: NVIC does not tail-chain to PendSV ISR

Susheel Nuguru — Tue, 13 Sep 2016 12:45:18 GMT

I am confused here, i tested this and also found that tail chaining is not happening not only with PendSV but with any interrupt... but this is a ARM Cortex feature right. You are writing directly to SCB block and not using any of the NRF features. I will have to look more into this tomorrow but I am not sure how much i should trust the debugger on this. Is there any other way you verify this without using debugger/breakpoints