https://devzone.nordicsemi.com/f/nordic-q-a/16640/how-do-correlate-sinking-and-sourcing-high-drive-current-on-nrf51422If, for example we would source 10 mA on 2 pins (2 x 5 mA), how much current can we sink on high drive pins? Is that 15 mA overall sinking and sourcing (which seems like it doesn&#39;t make sense) or we can sink 15 mA and source 15 mA?en-USTelligent Community 13Tue, 27 Sep 2016 08:51:58 GMThttps://devzone.nordicsemi.com/thread/63649?ContentTypeID=1Tue, 27 Sep 2016 08:51:58 GMT137ad170-7792-4731-bb38-c0d22fbe4515:a3cf1a13-8a6d-4676-a94a-46602fe22f3atobias zvonc<p>Thank you, but we don&#39;t need a safe answer, we need a precise answer (and explanation would be OK :) ).</p> <p>For example, if we are sourcing 5mA on 2 pins, our high side internal FET-s and VDD trace inside a chip is &quot;under stress&quot;. Why would that affect our sinking current capability (during sinking, lower side FET-s and VSS traces are under stress)?</p> <p>Another question - does high/standard/disconnect drive definition for pins have affect on TWI drive? I.e. if we have TWI interface ono 3.3V with 2k2 pullups, are we obligated to define &quot;high 0, disconnect 1&quot; drive? Or TWI has its own drive configuration? If does, what is maximum sinking current (if it is not 0.5mA)?</p> <p>EDIT: We would sink current on some other pins, not on those who are sourcing.</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/63648?ContentTypeID=1Tue, 27 Sep 2016 06:40:36 GMT137ad170-7792-4731-bb38-c0d22fbe4515:9ed4fa62-42b1-423e-8981-7bf18c3d6b4aStefan Birnir Sverrisson<p>Hi</p> <p><a href="https://devzone.nordicsemi.com/question/22112/nrf51822-gpio-as-open-collector-driver/?answer=22217#post-id-22217">15mA total current sink+source would be the safe answer</a></p><div style="clear:both;"></div>