Assembly language instruction set for nRF51

RE: Assembly language instruction set for nRF51

nordicdev — Fri, 07 Oct 2016 21:30:20 GMT

Please refer to :devzone.nordicsemi.com/.../ to find out the reason for me to go to assemly. Basically, the same code above has different delays at different compiler optimisation levels. Even if I dont have any delay and just the turning on and off of gpio pins have different delays in the loop at different optimisation levels.

RE: Assembly language instruction set for nRF51

awneil — Fri, 07 Oct 2016 07:41:59 GMT

Quite So...

RE: Assembly language instruction set for nRF51

RK — Fri, 07 Oct 2016 07:38:34 GMT

since there's a big honking NOP delay in there that hardly seems a problem. Apart from the fact the optimiser optimises it all out anyway.

I think in this case it's a misguided attempt to make accurately timed pulses in a loop without using a hardware timer (as was suggested by Aryan)

RE: Assembly language instruction set for nRF51

awneil — Fri, 07 Oct 2016 07:37:31 GMT

As already noted, the nRF51 has a Cortex-M0 core - so the instruction set is the Cortex-M0 Instruction set.

RE: Assembly language instruction set for nRF51

awneil — Fri, 07 Oct 2016 07:35:45 GMT

I guess (s)he's trying to toggle the pin as fast as possible - and fears that 'C' will impose an overhead ... ?

RE: Assembly language instruction set for nRF51

RK — Fri, 07 Oct 2016 04:31:29 GMT

Read the ARMv6-M Architecture manual which has the instruction set and all the details of the ARMv6, which is what the nRF51 is.

However, for that code, it's absolutely pointless doing it in assembler. Can't see a single reason you'd need to.