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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/17224/radio-ramp-up---what-registers-if-any-are-latched</link><description>I am trying to send lots of data through radio (basing on old micro esb project from github, but heavily modified).
I need to keep radio IDLE (not DISABLED) when not transmitting, because ramp-up time sometimes is too long and i am loosing data i need</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 28 Aug 2019 12:37:08 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/17224/radio-ramp-up---what-registers-if-any-are-latched" /><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/206626?ContentTypeID=1</link><pubDate>Wed, 28 Aug 2019 12:37:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:052aca92-5ac2-4f3d-8c8d-ab9500611674</guid><dc:creator>m.wagner</dc:creator><description>[quote userid="3788" url="~/f/nordic-q-a/17224/radio-ramp-up---what-registers-if-any-are-latched/66172"]Also what is worth considering is the value of DTX bits in MODECNF0 register. Configure it properly so it is easier for the receiver to detect start of the transmission frame.[/quote]
&lt;p&gt;Could you elaborate on this? What&amp;#39;s the impact of the configuration and what do you mean by &amp;quot;configure it properly&amp;quot;?&lt;/p&gt;
&lt;p&gt;I assume, you mean it has to be configured equally on both sides? Or do you take the expected preamble into account?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/66172?ContentTypeID=1</link><pubDate>Wed, 03 May 2017 22:35:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3d21ac9b-b6d1-4cde-900f-4d4abd55906e</guid><dc:creator>Wojtek</dc:creator><description>&lt;p&gt;Yes, it worked ok for me - there is no problem with transmission. I only got some hardware error that caused my hfclk go nuts and transmissions got broken then, but that was not the chip fault at all, but my oscillator. When i fixed that, i got really fast transmission (about 1.9mbps throughput)&lt;/p&gt;
&lt;p&gt;Also what is worth considering is the value of DTX bits in MODECNF0 register. Configure it properly so it is easier for the receiver to detect start of the transmission frame.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/66171?ContentTypeID=1</link><pubDate>Wed, 03 May 2017 20:08:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ca8c144-f97e-4f3e-9d41-da9599074a03</guid><dc:creator>Christopher</dc:creator><description>&lt;p&gt;Did you figure out how to keep the radio in IDLE in between transmissions? I am also running into the same issue. I would like to transmit multiple packets, with delays in between, and only perform the ramp-up once.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/66170?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2016 13:44:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4ddf7cc6-106d-4525-8f0c-28d7082be526</guid><dc:creator>FormerMember</dc:creator><description>&lt;p&gt;In general, the only registers that are latched are registers that are related to easyDMA. The reason is to be able to do double buffering and don&amp;#39;t loose time between the transmission sequences.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/66169?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2016 12:47:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:306b8407-b84d-4026-b20d-d86e9da0c131</guid><dc:creator>Wojtek</dc:creator><description>&lt;p&gt;Thank You for your answer! If PACKETPTR changes only in TXIDLE, that is ok for me. All the rest of radio registers can be modified anytime, right? It seems that I have some other problem in my implementation then.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RADIO ramp-up - what registers (if any) are latched?</title><link>https://devzone.nordicsemi.com/thread/66168?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2016 12:45:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f066c3fb-ecaa-4b03-a3c3-9b62ef90a200</guid><dc:creator>FormerMember</dc:creator><description>&lt;p&gt;PACKETPTR is a latched register when the radio is transmitting. When not transmitting, when in TXIDLE mode for instance, PACKETPTR is not latched. If changing/updating the value of PACKETPTR when the radio is transmitting, the radio will use the latched value. When the radio goes back to TXIDLE, the updated value for PACKETPTR is the one that will be used.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>