RE: Atomic variable access (locking)

Susheel Nuguru — Wed, 02 Nov 2016 13:35:34 GMT

Hi Alex,

You are disabling interrupt at the timer peripheral level so if there should have been any interrupt in these race period then it will be lost because the peripheral will not produce and hence cannot pend it.

In your case it will be better if you can disable it at NVIC level, because NVIC have pend bits then the incoming interrupt will be pended instead of being lost. So when you enable it, and if there was timer interrupt from peripheral in the mean time that caused a pendbit then it will be serviced and not lost.

Proposed solution is to do below, assuming that this is not ISR

NVIC_DisableIRQ(time_you_are_using_IRQn);
m_epoch_time += cval;
NVIC_EnableIRQ(time_you_are_using_IRQn);