https://devzone.nordicsemi.com/f/nordic-q-a/17756/spi-cpol-cpha-mode-documentation-mismatchHello, I&#39;m looking into documentation nRF52832_PS_v1.2.pdf and there is written: Mode Clock polarity Clock phase CPOL CPHA SPI_MODE0 0 (Leading) 0 (Active High) SPI_MODE1 0 (Leading) 1 (Active Low) SPI_MODE2 1 (Trailing) 0 (Active High) SPI_MODE3en-USTelligent Community 13Tue, 15 Nov 2016 14:59:28 GMThttps://devzone.nordicsemi.com/thread/68365?ContentTypeID=1Tue, 15 Nov 2016 14:59:28 GMT137ad170-7792-4731-bb38-c0d22fbe4515:25749c9a-345f-4a82-8aa2-a9b794e3262eSigurd<p>The SDK is correct.</p> <pre><code>CPOL 0 = Active high CPOL 1 = Active low </code></pre> <p>  </p> <pre><code>CPHA 0 = Leading CPHA 1 = Trailing </code></pre><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/68366?ContentTypeID=1Tue, 15 Nov 2016 14:41:40 GMT137ad170-7792-4731-bb38-c0d22fbe4515:e96e3f99-4357-47e9-b9fc-67ce37b70590vit bernatik<p>Looking at it for some more time it seems the wrong is documentation, and SDK is right. IMO the correct documentation shall say</p> <pre><code>Table 69: SPI modes Mode Clock polarity Clock phase CPOL CPHA SPI_MODE0 0 (Active High) 0 (Leading) SPI_MODE1 0 (Active High) 1 (Trailing) SPI_MODE2 1 (Active Low) 0 (Leading) SPI_MODE3 1 (Active Low) 1 (Trailing) </code></pre> <p>But still can you correct it at source? Unfortunately I do not have access to latex sources of your documentation so I can not correct it myself...</p><div style="clear:both;"></div>