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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/17865/nrf52-ram-retention-issue</link><description>Hi,
In my project i would like to save 100 bytes of information in RAM before going to System-off sleep mode.I have tested the example project given in sdk11 works okay.Have used the same in my application as well.I am using softdevice S132 .Configured</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 22 Nov 2016 08:56:38 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/17865/nrf52-ram-retention-issue" /><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68874?ContentTypeID=1</link><pubDate>Tue, 22 Nov 2016 08:56:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9ece0c24-0684-47cc-8069-e2db38b0c8e9</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;Bui,
Actually i was able to get it work in eclipse after making the section changes in ld file as you suggested .So I&amp;#39;m Converting that to answer.
-ya pasting code luks untidy but i could not find the option to attach the file here.Sorry!
Anyways thank you!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68875?ContentTypeID=1</link><pubDate>Tue, 22 Nov 2016 08:51:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f0494595-333e-45f6-aace-c4f0e25c83aa</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;@vishal: Please edit your question and attach your project (prefer KEIL) instead of pasting the code here.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68873?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 14:33:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cf7fa96e-3305-44db-aaa4-ea4c533f05d8</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;#define RAM_MEMORY_TEST_ADDRESS (0x2000F000UL)	/&lt;strong&gt;&amp;lt; Address in RAM where test word
#define RAM_MEMORY_TEST_WORD		(0xFEEDBEEFUL)	/&lt;/strong&gt;&amp;lt; Test word that is written to RAM address RAM_MEMORY_TEST_ADDRESS. */
#define RESET_MEMORY_TEST_BYTE	(0x0DUL)				/**&amp;lt; Known sequence written to a special register to check if this wake up is from System OFF. */&lt;/p&gt;
&lt;p&gt;#define MAX_TEST_ITERATIONS		 (1)						 /**&amp;lt; Maximum number of iterations this example will run. */
#define SUCCESS_OUTPUT_VALUE		(0xAB)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68872?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 14:32:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3ac9cbc7-c4db-4c3c-ae6f-fbbcad8d78c0</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;// This pin is used for waking up from System OFF and is active low, enabling sense capabilities.
nrf_gpio_cfg_sense_input(PIN_GPIO_WAKEUP, BUTTON_PULL, NRF_GPIO_PIN_SENSE_LOW);
nrf_delay_ms(1);&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;			 if ((NRF_POWER-&amp;gt;GPREGRET &amp;gt;&amp;gt; 4) == RESET_MEMORY_TEST_BYTE)
	{
			// Take the loop_count value.
		 
			NRF_POWER-&amp;gt;GPREGRET = 0;

		
		 // clear GPREGRET register before exit.
		 NRF_POWER-&amp;gt;GPREGRET = 0;
					


			if (*p_ram_test != RAM_MEMORY_TEST_WORD)
			{
					printf(&amp;quot;Read Failed\r\n&amp;quot;);
			}
			else{
				 printf(&amp;quot;Read Success\n&amp;quot;);
			}

			*p_ram_test = 0;
	}else{
		printf(&amp;quot;RESET\r\n&amp;quot;);
	}

	// Write the known sequence + loop_count to the GPREGRET register.

	NRF_POWER-&amp;gt;GPREGRET = ((RESET_MEMORY_TEST_BYTE &amp;lt;&amp;lt; 4));

	// Write the known value to the known address in RAM, enable RAM retention, set System OFF, and wait
	// for GPIO wakeup from external source.

	//LEDS_ON(1 &amp;lt;&amp;lt; READY_PIN_NUMBER);
	nrf_delay_ms(1000);

	// Switch on both RAM banks when in System OFF mode.
	NRF_POWER-&amp;gt;RAMON |= POWER_RAMON_ONRAM0_RAM0On &amp;lt;&amp;lt; POWER_RAMON_ONRAM0_Pos
		| POWER_RAMON_ONRAM1_RAM1On &amp;lt;&amp;lt; POWER_RAMON_ONRAM1_Pos
		| POWER_RAMON_OFFRAM0_RAM0On &amp;lt;&amp;lt; POWER_RAMON_OFFRAM0_Pos
		| POWER_RAMON_OFFRAM1_RAM1On &amp;lt;&amp;lt; POWER_RAMON_OFFRAM1_Pos;

	// Write test word to RAM memory.
	*p_ram_test = RAM_MEMORY_TEST_WORD;
		
		 printf(&amp;quot;\r\nSleep: \r\n&amp;quot;);
		  nrf_delay_ms(10);
	// Enter System OFF and wait for wake up from GPIO detect signal.
	NRF_POWER-&amp;gt;SYSTEMOFF = 0x1;
	// Use data synchronization barrier and a delay to ensure that no failure
	// indication occurs before System OFF is actually entered.
	__DSB();
	__NOP();
	printf(&amp;quot;\r\nStart: \r\n&amp;quot;);
&lt;/code&gt;&lt;/pre&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68871?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 14:31:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b36d03c9-9e35-4047-82e1-aefce79486f8</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;Bui,
I just ported the code into keil just the ram retention logic.What i observed was while in debug mode the ram retention works otherwise it does not.When I check the noint the code literally hangs up due to  some clock registers being uninitialized.Attaching the main file for you reference. The hash defines used below are from the ram retention sample code.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68870?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 13:14:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ae8860b7-252a-40bb-b6dd-4004517e7c0f</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;#define VARIANCE_DATA_ADDRESS 0x2000F080 //0x20009000
cheers!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68876?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 13:11:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d68caac7-08da-48ef-8399-43e36080cbac</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Please let me know where is the VARIANCE_DATA_ADDRESS.
Also please have a look at this &lt;a href="https://devzone.nordicsemi.com/question/836/ram-banks-ram-retention/"&gt;link&lt;/a&gt; at the answer by NICK.
You can follow what we do to configure NOLOAD section as in our DFU bootloader project in SDK v11.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68869?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 13:02:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d5527b36-49bb-498d-bfa8-7d450212c2a7</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;#define RESET_MEMORY_TEST_BYTE  (0x0DUL)
#define SIZE_OF_RAM_RETENTION_BUFFER 100
#define DEAD_BEEF 0xDEADBEEF
static uint32_t ram_retention_data[SIZE_OF_RAM_RETENTION_BUFFER];&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;void dot_boot_up() {

	uint32_t p_ramon[1], err_code, i, verification_data;

	err_code = sd_power_gpregret_get(p_ramon);
	APP_ERROR_CHECK(error_code);

	uint32_t * volatile p_ram_test = (uint32_t *) VARIANCE_DATA_ADDRESS;
	
	//Check For power Cycle
	if ((p_ramon[0] &amp;gt;&amp;gt; 4) == RESET_MEMORY_TEST_BYTE) {

		// clear GPREGRET register before exit.
		//NRF_POWER-&amp;gt;GPREGRET = 0;

		memset(&amp;amp;ram_retention_data, 0, sizeof(SIZE_OF_RAM_RETENTION_BUFFER));
		verification_data = 0;
		for (i = 0; i &amp;lt; SIZE_OF_RAM_RETENTION_BUFFER; i++) {
			//Read Data From RAM Location
			ram_retention_data[i] = *p_ram_test;
			*p_ram_test = 0;


			p_ram_test += 0x1;

		}


		verification_data |= ((uint8_t) ram_retention_data[INDEX_OF_VER_BYTE_0])
		&amp;lt;&amp;lt; 24;
		verification_data |= ((uint8_t) ram_retention_data[INDEX_OF_VER_BYTE_1])
		&amp;lt;&amp;lt; 16;
		verification_data |= ((uint8_t) ram_retention_data[INDEX_OF_VER_BYTE_2])
		&amp;lt;&amp;lt; 8;
		verification_data |=
		((uint8_t) ram_retention_data[INDEX_OF_VER_BYTE_3]);

		if (verification_data != DEAD_BEEF) { //check for data corruption by comparing to know seqence of data

			dprint(&amp;quot;RAM Read Failed\r\n&amp;quot;);

			memset(&amp;amp;ram_retention_data, 0,
				sizeof(SIZE_OF_RAM_RETENTION_BUFFER));
			ram_retention_data[INDEX_OF_VER_BYTE_0] = (uint8_t) ((DEAD_BEEF
				&amp;gt;&amp;gt; 24) &amp;amp; 0xFF);
			ram_retention_data[INDEX_OF_VER_BYTE_1] = (uint8_t) ((DEAD_BEEF
				&amp;gt;&amp;gt; 16) &amp;amp; 0xFF);
			ram_retention_data[INDEX_OF_VER_BYTE_2] =
			(uint8_t) ((DEAD_BEEF &amp;gt;&amp;gt; 8) &amp;amp; 0xFF);
			ram_retention_data[INDEX_OF_VER_BYTE_3] = (uint8_t) (DEAD_BEEF
				&amp;amp; 0xFF);

		} else {

			
			dprint(&amp;quot;Success&amp;quot;);

		}

		err_code = sd_power_gpregret_clr(0x0);
		APP_ERROR_CHECK(err_code);

	} else {
		dprint(&amp;quot;Device Reset/Corruption\r\n&amp;quot;);
		memset(&amp;amp;ram_retention_data, 0, sizeof(SIZE_OF_RAM_RETENTION_BUFFER));
		ram_retention_data[INDEX_OF_VER_BYTE_0] = (uint8_t) ((DEAD_BEEF &amp;gt;&amp;gt; 24)
			&amp;amp; 0xFF);
		ram_retention_data[INDEX_OF_VER_BYTE_1] = (uint8_t) ((DEAD_BEEF &amp;gt;&amp;gt; 16)
			&amp;amp; 0xFF);
		ram_retention_data[INDEX_OF_VER_BYTE_2] = (uint8_t) ((DEAD_BEEF &amp;gt;&amp;gt; 8)
			&amp;amp; 0xFF);
		ram_retention_data[INDEX_OF_VER_BYTE_3] = (uint8_t) (DEAD_BEEF &amp;amp; 0xFF);

	}
}


void dot_enter_sleep(void) {

	uint32_t * volatile p_ram_test = (uint32_t *) VARIANCE_DATA_ADDRESS;
	uint32_t err_code, i = 0;
	uint32_t ramon = 0;


	nrf_gpio_cfg_sense_input(16, NRF_GPIO_PIN_PULLUP, NRF_GPIO_PIN_SENSE_LOW);

	nrf_delay_ms(1);
	for (i = 0; i &amp;lt; SIZE_OF_RAM_RETENTION_BUFFER; i++) {

		*p_ram_test = 0;// Clear RAM Locations

		p_ram_test += 0x1;
	}

	p_ram_test = (uint32_t *) VARIANCE_DATA_ADDRESS;//Resest Address

	err_code = sd_power_gpregret_set((RESET_MEMORY_TEST_BYTE &amp;lt;&amp;lt; 4));
	APP_ERROR_CHECK(err_code);
	nrf_delay_ms(1);

	ramon = POWER_RAMON_ONRAM0_RAM0On &amp;lt;&amp;lt; POWER_RAMON_ONRAM0_Pos
	| POWER_RAMON_ONRAM1_RAM1On &amp;lt;&amp;lt; POWER_RAMON_ONRAM1_Pos
	| POWER_RAMON_OFFRAM0_RAM0On &amp;lt;&amp;lt; POWER_RAMON_OFFRAM0_Pos
	| POWER_RAMON_OFFRAM1_RAM1On &amp;lt;&amp;lt; POWER_RAMON_OFFRAM1_Pos;


	err_code = sd_power_ramon_set(ramon);
	APP_ERROR_CHECK(err_code);

	p_ram_test = (uint32_t *) VARIANCE_DATA_ADDRESS;
	
	for (i = 0; i &amp;lt; SIZE_OF_RAM_RETENTION_BUFFER; i++) {

		
		*p_ram_test = 0xAA; //Test Dummy Value
		nrf_delay_ms(1);



	}
	
	
	
	__DSB();

	dprint(&amp;quot;Sleep\r\n&amp;quot;);

	nrf_delay_ms(10);
	sd_power_system_off();

	dprint(&amp;quot;Sleep error\r\n&amp;quot;);

}
&lt;/code&gt;&lt;/pre&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68868?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 13:01:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b2a42ee-e4ca-43bb-af27-382ae7edc823</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;Hi Bui,
-I am using ARM GCC on eclipse.Below are the two function I use to read Data from RAM.And store data before going to sleep.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68866?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 12:43:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:055456e2-1d82-4366-9fab-66e0d6bdcbbe</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Which part of the memory do you plan to retain ? Could you post your code you use for memory retention ?
I&amp;#39;m thinking maybe the start up code may clean up the memory part you used. You may want to create a RAM section with NoInit check box checked in Project Option -&amp;gt; Target -&amp;gt; IRAM2&lt;/p&gt;
&lt;p&gt;It&amp;#39;s a note at section 18.2 i the nRF52 Spec v1.1 saying: &lt;em&gt;Note that these registers are usually overwritten by the startup code provided with the nRF application examples.&lt;/em&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68865?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 12:24:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:87610996-9018-4e21-bda9-a3f55224db5c</guid><dc:creator>vishal</dc:creator><description>&lt;p&gt;Hi Bui,
I do not want to retain data after power cycle.I would like the data to be retained after it comes out of sleep.In the example code it is working but that is without Softdevice.Our application is using s132.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf52 RAM Retention issue</title><link>https://devzone.nordicsemi.com/thread/68867?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2016 12:01:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ad70f757-8bf6-42a5-863a-d65feadd54b7</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Vishal,&lt;/p&gt;
&lt;p&gt;Please clarify, it&amp;#39;s not clear if you planned to retain the data when you power cycle the board, or power cycling is just part of the test process, what you want to retain is before and after you sleep after you power cycle ?&lt;/p&gt;
&lt;p&gt;It&amp;#39;s not possible to retain data when you power cycle.&lt;/p&gt;
&lt;p&gt;If you test with the test code from the SDK and do a power cycle and test again, do you have the same issue ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>