RE: Question related to the FPU anomaly.

RichieJH — Sun, 11 Dec 2016 08:24:55 GMT

Endnode has this answered below, but just to add don't worry about this anomaly. It is just the ARM Cortex having an FPU interrupt that needs to be cleared before calling sleep. Just add those lines per the note and sorted.

RE: Question related to the FPU anomaly.

endnode — Sat, 10 Dec 2016 21:57:36 GMT

Hi,

A) There is a workaround for this anomaly mentioned in anomaly description so you CAN use FPU even if your chip revision is affected, just implement that code (I would actually bet it is already included in nRF5 SDK so check that if you use it).

B) If you see second row printed on your chip you can clearly see that you have "QFAA-B00" so this chip is affected. Link between 6-char/digit identifier on IC packaging and build code is pretty clearly explained at Nordic infocenter here.

Cheers Jan