<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/18427/spi-failure-in-case-of-modifications-to-unrelared-code-segment</link><description>Hi everyone, 
 I am using nrf52832 with SDK version 11.0 for an IoT application. I am communicating with Atmel ATWINC 1500 module through SPI in order to connect to Wifi. My code was working fine until I added few new lines of code unrelated to SPI.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 04 Sep 2019 08:29:22 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/18427/spi-failure-in-case-of-modifications-to-unrelared-code-segment" /><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207821?ContentTypeID=1</link><pubDate>Wed, 04 Sep 2019 08:29:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aae66e07-7bee-48dc-aa2f-1d7574663cac</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/t_5f00_prachar"&gt;t_prachar&lt;/a&gt;: Great! The CPU does not have to touch the buffers the bug may occur when the CPU is writing or reading to the same RAM block as where the SPI3 DMA buffers at the same time as the SPIM is fetching data from RAM.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote user="t_prachar"] Does the &amp;quot;RAM block&amp;quot; mean &amp;quot;RAM section&amp;quot; as laid out in section 4.2.1 of the nRF52840 datasheet?&amp;nbsp; Or &amp;quot;RAM AHB slave&amp;quot;?[/quote]
&lt;p&gt;&amp;nbsp;By different RAM Block we mean different RAM AHB Slave.&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207759?ContentTypeID=1</link><pubDate>Tue, 03 Sep 2019 21:31:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9f4e5431-7b86-42dc-9cd7-2e4267fb1a9c</guid><dc:creator>t_prachar</dc:creator><description>&lt;p&gt;Enabling that workaround fixes the problem.&amp;nbsp; Thanks!&lt;/p&gt;
&lt;p&gt;We did not consider this workaround required because the the transmit and receive buffers are not touched by the CPU when the SPI transfer is in progress.&amp;nbsp; Perhaps the ambiguity is in what is meant by &amp;quot;same RAM block&amp;quot; in the errata description.&amp;nbsp; Perhaps you can describe in more detail what is meant by this phrase in this context since it is apparently a block that is larger than the buffer used by the SPI peripheral.&amp;nbsp; Does the &amp;quot;RAM block&amp;quot; mean &amp;quot;RAM section&amp;quot; as laid out in section 4.2.1 of the nRF52840 datasheet?&amp;nbsp; Or &amp;quot;RAM AHB slave&amp;quot;?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207546?ContentTypeID=1</link><pubDate>Tue, 03 Sep 2019 06:54:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e7a9556d-91ce-49af-b6b8-352c670475f4</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/t_5f00_prachar"&gt;t_prachar&lt;/a&gt;Is&amp;nbsp;&lt;span&gt;NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED&lt;/span&gt;&amp;nbsp;when you see the issue?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207502?ContentTypeID=1</link><pubDate>Mon, 02 Sep 2019 20:43:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f3542350-9ef8-4560-977d-62bdd36031ee</guid><dc:creator>t_prachar</dc:creator><description>&lt;p&gt;Was there ever resolution on this issue?&amp;nbsp; I see a similar issue where SPIM transfers result in invalid data intermittently. Increasing stack size made no difference, but taking out about 18KB from BSS eliminates the error.&amp;nbsp; The project (gcc) isn&amp;#39;t overly large,and RAM usage is modest.&amp;nbsp; On 2KB SPIM reads, the typical failure is the entire buffer is read back as 0x00.&amp;nbsp; I can repeat the read operation and it usually succeeds on the second attempt.&lt;/p&gt;
&lt;p&gt;This is with SDK15.0 and all error codes are being checked and no return errors are noted.&amp;nbsp; nrfx_spim driver on SPI instance 3 on the nRF52840.&amp;nbsp; gcc version 7.3.0.&lt;/p&gt;
&lt;p&gt;Start of .ld file (we have SD140 and the USB bootloader also loaded)&lt;/p&gt;
&lt;p&gt;MEMORY&lt;br /&gt;{&lt;br /&gt;FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0xda000&lt;br /&gt;RAM (rwx) : ORIGIN = 0x20007000, LENGTH = 0x39000&lt;br /&gt;}&lt;/p&gt;
&lt;div&gt;Failure case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&amp;nbsp;300308 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 46588 &amp;nbsp;348756 &amp;nbsp; 55254 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;Success case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&lt;span class="im"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&lt;/span&gt;&amp;nbsp;289332 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 28784 &amp;nbsp;319976 &amp;nbsp; 4e1e8 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207217?ContentTypeID=1</link><pubDate>Fri, 30 Aug 2019 21:30:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:55b90284-2eae-47ce-83a9-3609ecfb9781</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;edit: piqued++; // why do I bother ..&lt;/p&gt;
&lt;p&gt;You may be having this issue:&lt;/p&gt;
&lt;p&gt;&lt;em&gt;&amp;quot;3.29 [198] SPIM: SPIM3 transmit data might be&amp;nbsp;corrupted&lt;/em&gt;&lt;br /&gt;&lt;em&gt;This anomaly applies to IC Rev. Rev 2, build codes QIAA-Dx0, KAA-Dx0.&amp;nbsp;It was inherited from the previous IC revision Engineering D nRF52840.&lt;/em&gt;&lt;br /&gt;&lt;em&gt;Symptoms Transmit data from SPIM3 is corrupted.&lt;/em&gt;&lt;br /&gt;&lt;em&gt;Conditions:&amp;nbsp;&lt;/em&gt;&lt;em&gt;Data accessed by CPU location in the same RAM block as where the SPIM3 TXD.PTR is pointing, and CPU&amp;nbsp;does a read or write operation at the same clock cycle as the SPIM3 EasyDMA is fetching data.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&lt;em&gt;Consequences&amp;nbsp;&lt;/em&gt;&lt;em&gt;Transmit data from SPIM3 is corrupted.&lt;/em&gt;&lt;br /&gt;&lt;em&gt;Workaround&amp;nbsp;&lt;/em&gt;&lt;em&gt;Reserve dedicated RAM blocks for the SPIM3 transmit buffer, not overlapping with application data used&amp;nbsp;by the CPU. In addition, synchronize so that the CPU is not writing data to the transmit buffer while SPIM&amp;nbsp;is transmitting data.&amp;quot;&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;Changing code or moving RAM can have the unexpected side effect that the SPIM memory moves. There are some posts on this, worth a search perhaps but best to dedicate a RAM block just to SPI3. Hard to predict when a failure will occur, unless all other cpu RAM access are blocked.&lt;/p&gt;
&lt;p&gt;&lt;span&gt;NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED is worth looking at; don&amp;#39;t know if that helps (I haven&amp;#39;t studied it).&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;This&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/48645/spim3-sending-wrong-data-byte/193190#193190"&gt;spim3-sending-wrong-data-byte&lt;/a&gt;&amp;nbsp;link might help&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207214?ContentTypeID=1</link><pubDate>Fri, 30 Aug 2019 19:47:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:57b49921-9100-4067-bb7d-d04e6492a19e</guid><dc:creator>t_prachar</dc:creator><description>&lt;p&gt;Was there ever resolution on this issue?&amp;nbsp; I see a similar issue where SPIM transfers result in invalid data intermittently. Increasing stack size made no difference, but taking out about 18KB from BSS eliminates the error.&amp;nbsp; The project (gcc) isn&amp;#39;t overly large,and RAM usage is modest.&amp;nbsp; On 2KB SPIM reads, the typical failure is the entire buffer is read back as 0x00.&amp;nbsp; I can repeat the read operation and it usually succeeds on the second attempt.&lt;/p&gt;
&lt;p&gt;This is with SDK15.0 and all error codes are being checked and no return errors are noted.&amp;nbsp; nrfx_spim driver on SPI instance 3 on the nRF52840.&amp;nbsp; gcc version 7.3.0.&lt;/p&gt;
&lt;p&gt;Start of .ld file (we have SD140 and the USB bootloader also loaded)&lt;/p&gt;
&lt;p&gt;MEMORY&lt;br /&gt;{&lt;br /&gt;FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0xda000&lt;br /&gt;RAM (rwx) : ORIGIN = 0x20007000, LENGTH = 0x39000&lt;br /&gt;}&lt;/p&gt;
&lt;div&gt;Failure case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&amp;nbsp;300308 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 46588 &amp;nbsp;348756 &amp;nbsp; 55254 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;Success case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&lt;span class="im"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&lt;/span&gt;&amp;nbsp;289332 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 28784 &amp;nbsp;319976 &amp;nbsp; 4e1e8 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/207212?ContentTypeID=1</link><pubDate>Fri, 30 Aug 2019 18:59:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f4acb9f9-5371-4199-9c13-250f3c6e6798</guid><dc:creator>t_prachar</dc:creator><description>&lt;p&gt;Was there ever resolution on this issue?&amp;nbsp; I see a similar issue where SPIM transfers result in invalid data intermittently. Increasing stack size made no difference, but taking out about 18KB from BSS eliminates the error.&amp;nbsp; The project (gcc) isn&amp;#39;t overly large,and RAM usage is modest.&amp;nbsp; On 2KB SPIM reads, the typical failure is the entire buffer is read back as 0x00.&amp;nbsp; I can repeat the read operation and it usually succeeds on the second attempt.&lt;/p&gt;
&lt;p&gt;This is with SDK15.0 and all error codes are being checked and no return errors are noted.&amp;nbsp; nrfx_spim driver on SPI instance 3 on the nRF52840.&amp;nbsp; gcc version 7.3.0.&lt;/p&gt;
&lt;p&gt;Start of .ld file (we have SD140 and the USB bootloader also loaded)&lt;/p&gt;
&lt;p&gt;MEMORY&lt;br /&gt;{&lt;br /&gt;FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0xda000&lt;br /&gt;RAM (rwx) : ORIGIN = 0x20007000, LENGTH = 0x39000&lt;br /&gt;}&lt;/p&gt;
&lt;div&gt;Failure case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&amp;nbsp;300308 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 46588 &amp;nbsp;348756 &amp;nbsp; 55254 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;Success case:&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family:monospace;"&gt;&lt;span class="im"&gt;&amp;nbsp; &amp;nbsp;text &amp;nbsp; &amp;nbsp;data &amp;nbsp; &amp;nbsp; bss &amp;nbsp; &amp;nbsp; dec &amp;nbsp; &amp;nbsp; hex filename&lt;br /&gt;&lt;/span&gt;&amp;nbsp;289332 &amp;nbsp; &amp;nbsp;1860 &amp;nbsp; 28784 &amp;nbsp;319976 &amp;nbsp; 4e1e8 _build/nrf52840_xxaa_V3.out&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71118?ContentTypeID=1</link><pubDate>Thu, 22 Dec 2016 12:17:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ebbce2a-1c1c-4e9b-a738-df4c607d21ac</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Hi Bjorn,&lt;/p&gt;
&lt;p&gt;Setting the heap to 0 solved the problem but now when I enable TLS for mqtt communication I again get region RAM overflowed with stack. I have tried changing stack to 16kB with heap as 0 and also tried with various other combinations of stack and heap but the error stays the same. I think this is a separate issue therefore I posted it &lt;a href="https://devzone.nordicsemi.com/question/108030/region-ram-overflowed-with-stack-error-while-using-tls/"&gt;here&lt;/a&gt;.  I am not using any soft device so is there any way of making TLS work by utilizing maximum available RAM?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71117?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 12:58:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:737c7dd4-7336-44f2-81a9-724c41568d3c</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Happy to help :)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71116?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 12:43:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d7ab66d4-2e87-4d5d-97e4-37d824ab58cb</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Hi Bjorn,
Heap size was set to 8192 in the arm startup file and changing it to 0 has solved the problem for now. I can run whole functionality of my project with 8kB stack and heap as 0. Thanks for the support throughout :)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71119?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 10:36:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ceb0409-a5b9-44ba-b563-d1c37d0d5ba0</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Are you using the heap in your project? If not then you can set the heap size to zero by adding the following assembler flag.&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;ASMFLAGS += -D__HEAP_SIZE=0
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;If &lt;code&gt;__HEAP_SIZE&lt;/code&gt;is not defined, then it will be by default set to 8192, i.e. 8kB.  You should be able to increase the stack size by setting the heap size to zero.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71115?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 10:29:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6133212b-d4c8-4668-b974-c62f731d95cf</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;13kB seems to be the upper limit as I start getting &amp;quot;region RAM overflowed with stack&amp;quot; from 14kB&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71114?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 10:24:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f0bf3d07-f84a-4045-b33d-ca94b9fe28f7</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;No problem Jawad, we&amp;#39;re here to help. Are you able to increase the stack size even further or is 13kB the upper limit?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71110?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 10:15:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:97ae541f-39f4-4098-99e1-37963791f08d</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Hi Bjorn,&lt;/p&gt;
&lt;p&gt;It doesn&amp;#39;t work with the 12kB RAM but it works with 13kB but now there is another issue. In my project I am using an LED to represent different system states. When I go to 13kB, the SPI and the wifi communication starts working fine but the LED stops responding. When I comment out the previously mentioned part of code it works again. Apologies for bothering you time and again but do you have any other suggestions.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71111?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 09:40:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:53e8a709-30d0-4587-a606-752678d3c280</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Ok, try reducing the stack size to 12kB&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;ASMFLAGS += -D__STACK_SIZE=12288
&lt;/code&gt;&lt;/pre&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71113?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 08:57:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6721ffa8-f14e-4070-8a48-b518f5cb58e2</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Thanks Bjorn, If I add the above mentioned line to the Makefile I get the following error
&amp;quot;region RAM overflowed with stack&amp;quot; during compile&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71112?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2016 08:50:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eeceacc4-326c-4755-88c3-673b4470e7a8</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;I just wanted to check whether the initialization of the GPIO pins affected the SPI peripheral. Yes, it is possible that this is a memory issue, but I would expect the nRF52 to hardfault if you were pushing large arrays to the stack and causing stack overflow. You can try to increase the stack size, e.g. doubling it by adding the following define to the assembler flags&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;ASMFLAGS += -D__STACK_SIZE=16384
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Other than than my only advice is to comment out all the code that causes the SPI to nor function properly and then include small sections at the time until the error occurs while keeping an eye on the stack pointer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71109?ContentTypeID=1</link><pubDate>Mon, 19 Dec 2016 16:10:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c3ed1ada-7af7-4d0a-9c18-1b556bcee485</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Hi Bjorn,
I have tried with what you said and then SPI works but the issue is that the part of code I am commenting out to make SPI work does not have anything to do with the pins of SPI. Instead there are a lot of pointers and arrays are present in that part so I was wondering if it is a memory issue. Do you have any suggestion about debugging such an issue?&lt;/p&gt;
&lt;p&gt;Thanks a lot so far&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71108?ContentTypeID=1</link><pubDate>Mon, 19 Dec 2016 13:34:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:555f7fb4-e007-4a78-80fc-685fec778eb0</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;I am assuming that you&amp;#39;re initializing the GPIO pins somewhere in the code. Could you comment out all code associated with these pins except the initialization? Does the SPI function properly then?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71106?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2016 09:54:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f1457ce9-3c35-4a28-8aec-b5c657c0d631</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Hi Bjorn, Please see my response below&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71107?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2016 09:43:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c6ccb6a9-d616-40ab-8e41-a1aa537c9b17</guid><dc:creator>Jawad</dc:creator><description>&lt;p&gt;Thanks for the comment Bjorn. Below are few such lines of code. They are there for the recording of signals received on gpio pins and those pins are completely different from SPI pins.&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;	//if transmit interrupt has triggered- toggle pins and reset timer
	if(bus_driver_pins_toggle_flag_volatile == true){
		//reset the flag which has been set in the ISR
		bus_driver_pins_toggle_flag_volatile = false;
		SEGGER_RTT_WriteString(0,&amp;quot;noooooooooooooooooooooooooooooooooooooooooooooooooooo\n\r\n\r\n\r\n\r\n\r\n\r&amp;quot;);

		vBus_Pin_Toggle_Handler(); // Uses the hard coded pulse times
		//vBus_Pin_Toggle_Handler_Recorded(); // Uses the real measured pulse times
	}

	//if comparator interrupt has triggered - do time measurement
	if(bus_driver_comparator_flag_volatile == true){

		vBus_Pulse_Time_Measurment_Handler();
	}

	//if time out is detected this means the package has been received.
	if(bus_driver_time_out_flag_volatile == true){
		bus_driver_time_out_flag_volatile = false;
		vDisable_Bell_Signal_Reception();
		SEGGER_RTT_WriteString(0,&amp;quot;Bus package received\n\r&amp;quot;);
		u32_bell_detected_flag = u32_Check_Bus_Package();
	}
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Also here is another part of code, with same implications,controlling LEDs through pins unrelated to SPI&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;		   if ((led_delay_value != 0xFFFFFFFF) &amp;amp; (led_delay_value &amp;gt; 0))
				{
					led_delay_value --;
				}
				status_led_main(calling_argument_for_status_led_main);
&lt;/code&gt;&lt;/pre&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI failure in case of modifications to unrelared code segment</title><link>https://devzone.nordicsemi.com/thread/71105?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2016 09:34:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8e1da7f1-b4b1-4132-8be5-22abba6feda0</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Hi Jawad, could you post the &amp;quot;unrelated&amp;quot; code that causes the SPI communication to fail?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>