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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI Master ready event not cleared</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/18669/spi-master-ready-event-not-cleared</link><description>I am implementing an SPI master to communicate with an accelerometer using the SPI HAL directly. My chip is marked nrf51822QFACA11609AC. I have implemented blocking functions for reading and writing registers on the slave. 
 I am experiencing unexpected</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 03 Jan 2017 10:25:54 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/18669/spi-master-ready-event-not-cleared" /><item><title>RE: SPI Master ready event not cleared</title><link>https://devzone.nordicsemi.com/thread/72093?ContentTypeID=1</link><pubDate>Tue, 03 Jan 2017 10:25:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:51025c38-ab1a-4e58-991e-23d7d95888a3</guid><dc:creator>Petter Myhre</dc:creator><description>&lt;p&gt;I see. No Problem :) If I answered your question, maybe you can accept my answer by clicking the grey circle next to it?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Master ready event not cleared</title><link>https://devzone.nordicsemi.com/thread/72092?ContentTypeID=1</link><pubDate>Mon, 02 Jan 2017 15:31:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:00e166df-9ad1-4fc6-871f-430099c1a624</guid><dc:creator>Kim Astrom</dc:creator><description>&lt;p&gt;OK, thank you for the clarification. The reason I misinterpreted the documentation was that
in the nrf51 reference manual SPI master flowchart (figure 58), clearing of the READY event is not depicted, and there are also some discussion threads where it has been claimed that RXD read does the clearing.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Master ready event not cleared</title><link>https://devzone.nordicsemi.com/thread/72091?ContentTypeID=1</link><pubDate>Mon, 02 Jan 2017 11:18:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:900897c5-f07c-4b7e-a2b3-4ca1a52811bb</guid><dc:creator>Petter Myhre</dc:creator><description>&lt;p&gt;This is expected behavior, you need to clear the events manually.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>