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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>ESD test of NRF51822 fail</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/19832/esd-test-of-nrf51822-fail</link><description>Hi, 
 We designed the circuit followed the reference circuit(QFN48), and all the value of power capacities are also followed the reference circuit. But we failed in the 8kv ESD test. 
 We added 2 capacities of 10uF at VDD pin, and then we can pass 7kv</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 09 May 2017 10:04:09 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/19832/esd-test-of-nrf51822-fail" /><item><title>RE: ESD test of NRF51822 fail</title><link>https://devzone.nordicsemi.com/thread/77132?ContentTypeID=1</link><pubDate>Tue, 09 May 2017 10:04:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7ca2db28-f2d8-4ec1-9d70-faa2099401fa</guid><dc:creator>mansfield</dc:creator><description>&lt;p&gt;Thank you！ We have tried some solutions, but can&amp;#39;t pass the test still. The CPU always reset while ESD testing.&lt;/p&gt;
&lt;p&gt;The 8kv ESD power is appled on a mirco-USB shell, and then the CPU reset. The reset source REG can&amp;#39;t indecate any reset reason. And we monitored the 3.3V power but didn&amp;#39;t find the power fall.&lt;/p&gt;
&lt;p&gt;So are there any reasons that can cause the CPU resetting? Such as power peak, disturbs on IO port......&lt;/p&gt;
&lt;p&gt;A short disturb of several KV on power or IO port will cause a protection reset of CPU?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: ESD test of NRF51822 fail</title><link>https://devzone.nordicsemi.com/thread/77131?ContentTypeID=1</link><pubDate>Mon, 20 Feb 2017 11:46:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ddef4fd3-73bb-40bc-903d-d12ed9a0d0fa</guid><dc:creator>J&amp;#248;rn</dc:creator><description>&lt;p&gt;Hello Mansfield&lt;/p&gt;
&lt;p&gt;The safety and performance for the nRF51822 is only guaranteed for up to 4 kV with the Human Body Model, or 750 V with the Charged Device Model, as stated in the Absolute maximum ratings in the datasheet, so the 8kV ESD test is outside the spec and we cannot guarantee its performance.&lt;/p&gt;
&lt;p&gt;Changing the capacitance of the VDD pin should be fine as long as the supply rise time is within specification.&lt;/p&gt;
&lt;p&gt;If the DC/DC converter is used, adding additional capacitance to AVDD is not recommended as it can affect startup times of hardware in the chip.&lt;/p&gt;
&lt;p&gt;Adding additional capacitance to DEC1 and DEC2 is not recommended as it can affect the startup time of hardware in the chip, which can affect system stability.&lt;/p&gt;
&lt;p&gt;Adding additional capacitance to VDD_PA is not recommended as it can affect radio performance.&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Jørn Frøysa&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>