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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Program custom board using j-link edu</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/20705/program-custom-board-using-j-link-edu</link><description>I&amp;#39;m facing problem while program custom board. I&amp;#39;m using nrf51822 module( link ) &amp;amp; j-link EDU 9.3 version. I think there is some connection issue. Here is my connection 
 J-link----------------nrf51822 
 VTnrf----------------VDD 
 GND-------------</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 23 Mar 2017 10:24:11 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/20705/program-custom-board-using-j-link-edu" /><item><title>RE: Program custom board using j-link edu</title><link>https://devzone.nordicsemi.com/thread/80773?ContentTypeID=1</link><pubDate>Thu, 23 Mar 2017 10:24:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b449eac8-5000-4735-9080-e84024ad9a2c</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;No you don&amp;#39; t need pull up. If the chip is revision 1 (very less likely, check the revision &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf51/dita/nrf51/compatibility_matrix/nRF51822_ic_revision_overview.html?cp=3_0_1"&gt;here&lt;/a&gt;. ) you would need pull down on SWDCLK.&lt;/p&gt;
&lt;p&gt;Made sure you provided 3.3V to nRF51822 and that is connected to VTref.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>