51822 Number of times an address can be written between erase cycleshttps://devzone.nordicsemi.com/f/nordic-q-a/21094/51822-number-of-times-an-address-can-be-written-between-erase-cyclesHi To write the some state of the device, I write two bits into the NVM memory. Thus, we get 16 write cycles to one address without erasing. I did this based on the optimization of erase / write cycles. A few weeks of testing the device works withouten-USTelligent Community 13Tue, 04 Apr 2017 16:16:29 GMTRE: 51822 Number of times an address can be written between erase cycleshttps://devzone.nordicsemi.com/thread/82500?ContentTypeID=1Tue, 04 Apr 2017 16:16:29 GMT137ad170-7792-4731-bb38-c0d22fbe4515:af4a313d-f0d2-4ddf-b920-852675eb9d04hamster66<p>Ok. Thanks.</p><div style="clear:both;"></div>RE: 51822 Number of times an address can be written between erase cycleshttps://devzone.nordicsemi.com/thread/82499?ContentTypeID=1Tue, 04 Apr 2017 13:39:58 GMT137ad170-7792-4731-bb38-c0d22fbe4515:8dc7ce91-b8bd-4297-aa23-d79814f66e32bjorn-spockeli<p>Yes, I would recommend that you rewrite you algorithm so that its within the nRF51822 specification, i.e. only write to the same address twice between erase cycles. Otherwise, you risk corrupting the data.</p> <p>Best regards</p> <p>Bjørn</p><div style="clear:both;"></div>