<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/21455/spi-behaviour-is-random-depending-on-the-previous-code</link><description>Dear Nordic Team,
Meanwhile, I&amp;#39;ve burned through a week finding a solution for this problem.
Now I am out of ideas where to check for problems. 
 
 My application:
I&amp;#39;m using an nRF52832-QFAABO 1639DE via SPI I am communication with a WiFi SoC (ATWINC1500</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 24 Apr 2017 13:29:42 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/21455/spi-behaviour-is-random-depending-on-the-previous-code" /><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84173?ContentTypeID=1</link><pubDate>Mon, 24 Apr 2017 13:29:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:bfd6b7f1-0c1e-4e19-97bb-5f3f59a45439</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;@timur: I agree with @RK that the flash placement should not affect the timing of any of the nRF52&amp;#39;s peripherals. As long as you have configured the NFC pins to be normal GPIO pins using the UICR &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/uicr.html?cp=2_2_0_13_0_62#register.NFCPINS"&gt;NFCPINS&lt;/a&gt; register, i.e. defined &lt;code&gt;CONFIG_NFCT_PINS_AS_GPIOS&lt;/code&gt; in your preprocessor symbols you should not see any issues.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84172?ContentTypeID=1</link><pubDate>Fri, 21 Apr 2017 16:55:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:71af7d10-80fb-479c-9059-51e3c88a6594</guid><dc:creator>TY</dc:creator><description>&lt;p&gt;@Bjørn Spockeli
I was developing all the time with optimisation off,
just after realising that removing source files from the makefile (which are not needed) also changed the behaviour I was playing around with the optimisation flag and just changed it from 0 to 1.
@b
I&amp;#39;ll get a decent logic analyser next week to observe all pins off the WiFi SoC.
Meanwhile, I am certain that the behaviour of the WiFi SoC is wrong however this is caused by the slightly altered FW on the nRF52 (optimisation or off).&lt;/p&gt;
&lt;p&gt;I am using the NFC pins for SPI which re-configured at beginning of my main().
Is there any ***-up potential?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84171?ContentTypeID=1</link><pubDate>Fri, 21 Apr 2017 07:23:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f5f14466-e40d-4e31-b625-18e9210ece6d</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;@timur(TY): What was the optimization level set to before you set it to 1? Was it level 3 and do you see any improvements if you set it to leve 0, i.e. none?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84174?ContentTypeID=1</link><pubDate>Thu, 20 Apr 2017 14:39:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b0a6f7ff-07ab-44c7-86f3-abe8fc54a189</guid><dc:creator>TY</dc:creator><description>&lt;p&gt;What I mean regarding the malloc thing is that I can see in the map file that malloc has been put on the flash although I am never calling it.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84175?ContentTypeID=1</link><pubDate>Thu, 20 Apr 2017 12:42:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:23fb8be0-7760-4d65-9397-681a659bc2c2</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;it&amp;#39;s more likely that you have a bug somewhere which trashes memory and that&amp;#39;s what&amp;#39;s causing your problems.&lt;/p&gt;
&lt;p&gt;Nothing else you write makes any sense really, flash placement isn&amp;#39;t going to change the timing of anything by any appreciable difference and your comments about malloc .. I really don&amp;#39;t know what you&amp;#39;re even suggesting. Optimized code does run faster, but if the whole thing is properly interrupt driven, that&amp;#39;s not going to be an issue.&lt;/p&gt;
&lt;p&gt;Optimisation is pretty good at uncovering memory bugs.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84170?ContentTypeID=1</link><pubDate>Thu, 20 Apr 2017 12:17:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1fa595c9-301b-47df-8814-5583d8b9eff6</guid><dc:creator>TY</dc:creator><description>&lt;p&gt;Update:&lt;/p&gt;
&lt;p&gt;I can cause the communication between WiFi SoC and nRF52 to fail. By changing the optimization flag.&lt;/p&gt;
&lt;p&gt;Right now the code runs through more steps in the connection procedure to the broker when the O flag is set to 1.&lt;/p&gt;
&lt;p&gt;However, I can cause this to happen by just changing random thinks in functions which are not even getting called. Thus, the only difference is the allocation in flash. Meaning functions get assigned to different addresses.&lt;/p&gt;
&lt;p&gt;So my question how can this change the behaviour of the FW in such a way that that the SPI communication fails with WiFi SoC.
If checked the commands I am sending to the WiFi SoC they seem OK and it already gets connected to the router and does get it&amp;#39;s IP from DHCP. But after trying to close the SPI session the command gets acknowledged with random values from the WiFi SoC.&lt;/p&gt;
&lt;p&gt;The only possible explanation I have is that the altered flash allocation changes the timing behaviour of the nRF52.&lt;/p&gt;
&lt;p&gt;-Does anyone have an idea what could be wrong with the flash allocation?
-Why does the linker actually puts malloc from the gcc libraries in the flash if I am not calling it?
-Is there a possibility that I missed a setting regarding the boot loader or the SD which are not present&lt;/p&gt;
&lt;p&gt;Solution:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.google.com/a/locumilabs.com/document/d/1zpW2i0cwTEwe7SjFBBPdERRfCLiynGkKhhPMosBkQRw/edit?usp=sharing"&gt;docs.google.com/.../edit&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84169?ContentTypeID=1</link><pubDate>Wed, 19 Apr 2017 13:05:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d1668d1a-b3e9-429c-b2f1-079c3b7b71b1</guid><dc:creator>TY</dc:creator><description>&lt;p&gt;Dear Nordic Team, just trying to move this post more to the top&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84166?ContentTypeID=1</link><pubDate>Wed, 19 Apr 2017 09:37:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ae23572d-ea13-4e2e-9606-d7da2125c524</guid><dc:creator>Daniel Sullivan</dc:creator><description>&lt;p&gt;Just tried all of the SPI related fixes in 109 in my code to no result unfortunately.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84168?ContentTypeID=1</link><pubDate>Wed, 19 Apr 2017 09:19:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b9c0ee2-4137-4536-8ad2-e7516ad79812</guid><dc:creator>TY</dc:creator><description>&lt;p&gt;Cheers, I&amp;#39;ll let you know if I figure out something&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI behaviour is random depending on the previous code</title><link>https://devzone.nordicsemi.com/thread/84167?ContentTypeID=1</link><pubDate>Wed, 19 Apr 2017 09:15:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c1939406-1782-4306-9ef0-8fe9c2eab8a8</guid><dc:creator>Daniel Sullivan</dc:creator><description>&lt;p&gt;I see why you followed my thread - you&amp;#39;re having a quite similar issue. I&amp;#39;m going to have a play with the issue 109 fixes. I&amp;#39;m on the nrf52840 which doesn&amp;#39;t have 109 listed in its errata but ... hmmm. I&amp;#39;ll post back here as well if I have any luck.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>