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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>spi missing interrupts</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/22509/spi-missing-interrupts</link><description>I am using NRF51422 S130. I have a master SPI configuration set up, and not using Nordic spi drivers provided in the examples. I think my configuration is correct. 
 1- I send one byte of data at 2Mbips clock rate and can see on scope the 8 clock bits</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 02 Jun 2017 12:28:22 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/22509/spi-missing-interrupts" /><item><title>RE: spi missing interrupts</title><link>https://devzone.nordicsemi.com/thread/88563?ContentTypeID=1</link><pubDate>Fri, 02 Jun 2017 12:28:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:45f13600-233e-4294-91fe-2b2ce3461688</guid><dc:creator>Jay S.</dc:creator><description>&lt;p&gt;I found the solution. Although the nrfF51 spec does not explicitly explains this but in order to get a new interrupt you need to read every input received by SPI in addition to clear READY register.
I simply added {rdata = NRF_SPI1-&amp;gt;RXD;} in the IRQ service call and I am getting every READY IRQ.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: spi missing interrupts</title><link>https://devzone.nordicsemi.com/thread/88561?ContentTypeID=1</link><pubDate>Fri, 02 Jun 2017 08:33:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:67e3e72a-9978-4707-b5c4-9f5113d4ce01</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Can you post/upload your code and possibly a logic trace of the SPI bus?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: spi missing interrupts</title><link>https://devzone.nordicsemi.com/thread/88562?ContentTypeID=1</link><pubDate>Fri, 02 Jun 2017 00:26:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ed50ea09-05f4-493c-9d35-00c93a0973d4</guid><dc:creator>Wojtek</dc:creator><description>&lt;p&gt;Something is wrong.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>