NRF51822 BLE NANO SoC SPI Speed and Docs?

RE: NRF51822 BLE NANO SoC SPI Speed and Docs?

Sigurd — Thu, 08 Jun 2017 07:24:21 GMT

Hi eli11, for BLE Nano v1.0 the pin labeled CS is by default GPIO pin 10 on the nRF51822.

RE: NRF51822 BLE NANO SoC SPI Speed and Docs?

eli11 — Wed, 07 Jun 2017 22:41:16 GMT

This is great! Also when reading the docs I found that the SPI master does not support chip select directly so the a GPIO pin just be used. Then what is the CS pin on the nRF51822 BLE Nano used for?

RE: NRF51822 BLE NANO SoC SPI Speed and Docs?

endnode — Wed, 07 Jun 2017 18:13:01 GMT

Hi Eli,

All Nordic documentation can be found at infocenter.nordicsemi.com, nRF1 family references are here. Note that nRF51 chips have documentation split between Reference Manual (common for whole family) and Product Specification (for each chip variant) while nRF52 has only single document per product.

ARM Cortex-M0 documentation must be located at ARM web site (first Google search hit leads to here).

When it comes to SPI on nRF51822: are you talking about Master or Slave role? Assuming that clock is controlled by master then according to allowed values of FREQUENCY register listed in chapter 26 of nRF51 Reference Manual v3.0.1 chip supports 125kHz, 250kHz, 500kHz, 1MHz, 2MHz, 4MHz and 8MHz clock.

Cheers Jan