how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

ovrebekk — Wed, 02 Aug 2017 08:53:25 GMT

Hi Pallavi

I have no experience with the ST solution unfortunately.

What is the difference between this implementation and the Arduino project you worked on earlier?

Assuming the Arduino board is working fine with the nRF24L01 module you should be able to use that as a reference to figure out what is going wrong here.

Best regards
Torbjørn

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Mon, 17 Jul 2017 07:58:33 GMT

hello,

anyone have any idea about this.

Pallavi

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Fri, 14 Jul 2017 07:36:17 GMT

and for this receiver code is,

#define multiplier 4
#define DISCOVERY 1
#if defined DISCOVERY
#include <iostm8S105c6.h>
#elif defined PROTOMODULE
#include <iostm8s103k3.h>
#else
#include <iostm8s103f3.h>
#endif
#include <intrinsics.h>

#define         CE       PD_ODR_ODR3 
#define         CSN      PD_ODR_ODR2 
#define         SCK      PC_ODR_ODR7
#define         MOSI     PC_ODR_ODR6
#define         MISO     PC_IDR_IDR5  
#define         IRQ      PD_IDR_IDR4 

///////////////////////////////////////////////////////

#define TX_ADR_WIDTH    5    // 5 uints TX address width
#define RX_ADR_WIDTH    5    // 5 uints RX address width
#define TX_PLOAD_WIDTH  32  // 20 uints TX payload
#define RX_PLOAD_WIDTH  32   // 20 uints TX payload
unsigned char  TX_ADDRESS[TX_ADR_WIDTH]= {0xE7,0xE7,0xE7,0xE7,0xE7}; 
unsigned char  RX_ADDRESS[RX_ADR_WIDTH]= {0xE7,0xE7,0xE7,0xE7,0xE7}; 


/////////////// SPI(NRF24l01) commands////////////////

#define READ_REG        0x00   
#define WRITE_REG       0x20  
#define RD_RX_PLOAD     0x61   
#define WR_TX_PLOAD     0xA0   
#define FLUSH_TX        0xE1  
#define FLUSH_RX        0xE2   
#define REUSE_TX_PL     0xE3   
#define NOP             0xFF   

///////////////SPI(nrf24l01) registers///////////////////////////////////////

#define CONFIG          0x00  
#define EN_AA           0x01  
#define EN_RXADDR       0x02 
#define SETUP_AW        0x03  
#define SETUP_RETR      0x04  
#define RF_CH           0x05 
#define RF_SETUP        0x06  
#define STATUS          0x07  
#define OBSERVE_TX      0x08 
#define CD              0x09           
#define RX_ADDR_P0      0x0A  
#define RX_ADDR_P1      0x0B  
#define RX_ADDR_P2      0x0C  
#define RX_ADDR_P3      0x0D  
#define RX_ADDR_P4      0x0E  
#define RX_ADDR_P5      0x0F  
#define TX_ADDR         0x10 
#define RX_PW_P0        0x11  
#define RX_PW_P1        0x12  
#define RX_PW_P2        0x13  
#define RX_PW_P3        0x14 
#define RX_PW_P4        0x15  
#define RX_PW_P5        0x16  
#define FIFO_STATUS     0x17  

///////////////////////////////////////////////////////////////////////////

unsigned char    sta;
#define   RX_DR  (sta & 0x40)
#define   TX_DS  (sta & 0x20)
#define   MAX_RT  (sta & 0x10)


////////////////////////////////////////////////////////////////////////////


 void init_io_config()
 {
   PC_DDR_DDR5=0;
   PC_DDR_DDR6=1;
   PC_DDR_DDR7=1;
   
   PD_DDR_DDR2=1;
   PD_DDR_DDR3=1;
   PD_DDR_DDR4=0;
   
   
   PC_CR1_C15=1;
   PC_CR1_C16=1;
   PC_CR1_C17=1;
   
   PD_CR1_C12=1;
   PD_CR1_C13=1;
   PD_CR1_C14=0;
   PC_CR2 = 0x00; 
   PD_CR2 = 0x00;
 }

 void delayms(unsigned int count)
{
 unsigned int i,j;
 for(i=0;i<count;i++)
 for(j=0;j<450;j++);
}
 
unsigned char SPI_RW(unsigned char byte)
{
    unsigned char i;
    for(i=0;i<8;i++) // output 8-bit
    {
      MOSI=(byte & 0x80);
      byte = (byte << 1); 
      SCK = 1;
      byte|=MISO;
      SCK = 0;
    }
    return (byte);
      
}

unsigned char SPI_RW_Reg(unsigned char reg, unsigned char value)
{
 unsigned int  status;
 CSN = 0;                   // CSN low, init SPI transaction
 status = SPI_RW(reg);      // select register
 SPI_RW(value);             // ..and write value to it..
 CSN = 1;                   // CSN high again
 return(status);            // return nRF24L01 status uchar
}

unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char num)
{
 unsigned char status,byte_ctr=0;
 
 CSN = 0;            
 status = SPI_RW(reg);   
 for(byte_ctr=0; byte_ctr < num; byte_ctr++)
 {   
     SPI_RW(*pBuf++);
 }
 CSN = 1;           
 return(status);   
}



void init_NRF24L01(void)
{
  delayms(1);
  CE=0;    // chip enable
  CSN=1;   // Spi disable 
  SCK=0;   // Spi clock line init high
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); //set pwr up bit enable
 SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    
 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); 
 SPI_RW_Reg(WRITE_REG + EN_AA, 0x00);       
 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);   // enable pipe 0
 SPI_RW_Reg(WRITE_REG + SETUP_AW, 0x02);    // set up address width 5 bytes
 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x00);  // retransmission disabled
 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   //pwr=0dbm,datarate =1 mbps,lna:hcurr
 SPI_RW_Reg(WRITE_REG + RF_CH, 0x2c);          //
 SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); //
 CE=1;               //make ce high
}


void SetTX_Mode(void)
{
 CE=0;
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     
 CE = 1; 
 delayms(1);
}
void nRF24L01_TxPacket(unsigned char * tx_buf)
{
  
 CE=0;   
 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); 
 SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH); 
 sta=SPI_RW(STATUS);
 while(TX_DS!=1);
 SPI_RW_Reg(WRITE_REG + STATUS, 0x00);
 sta = SPI_RW(STATUS);
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     
 CE=1;   
 delayms(2);
 CE=0;   

}

void SetRX_Mode(void)
{
 CE=0;
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     
 CE = 1; 
 delayms(1);
}

unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char num)
{
 unsigned char  status,byte_ctr=0;
 
 CSN = 0;                      // Set CSN low, init SPI tranaction
 status = SPI_RW(reg);         // Select register to write to and read status uchar
 for(byte_ctr=0;byte_ctr < num; byte_ctr++)   
 pBuf[byte_ctr] = SPI_RW(0);     
 
 CSN = 1;                           
 
 return(status);                    // return nRF24L01 status uchar
}

unsigned char nRF24L01_RxPacket(unsigned char* rx_buf)
{
  unsigned char revale=0;
  SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     
  CE = 1;    
  sta=SPI_RW(STATUS);
  while(RX_DR);
  if(RX_DR)
  {
  CE = 0;    
  SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
  revale =1;  
 }
 SPI_RW_Reg(WRITE_REG + STATUS, 0x00);
 sta = SPI_RW(STATUS);
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);
 return revale;
}



void main()
{
  unsigned char TxBuf[32]={0};   
  unsigned char RxBuf[32]={0};
  init_io_config();
  init_NRF24L01() ;
 /* TxBuf[1] =0x55;
  SetTX_Mode();
  nRF24L01_TxPacket(TxBuf);
    delayms(500);
*/
  SetRX_Mode();
  nRF24L01_RxPacket(RxBuf);
  
 }

Do you think it is right?

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Fri, 14 Jul 2017 06:46:32 GMT

hello ,

i found the code of nrf24l01+STM8s..the code is written by doing bitbanging.

the code for transmitter is,

////////////////MASTER////////////////


//#include <iostm8S105c6.h>
#define multiplier 4
#define DISCOVERY 1
#if defined DISCOVERY
#include <iostm8S105c6.h>
#elif defined PROTOMODULE
#include <iostm8s103k3.h>
#else
    #include <iostm8s103f3.h>
#endif
#include <intrinsics.h>


#define         CE       PD_ODR_ODR3 
#define         CSN      PD_ODR_ODR2 
#define         SCK      PC_ODR_ODR7
#define         MOSI     PC_ODR_ODR6
#define         MISO     PC_IDR_IDR5  
#define         IRQ      PD_IDR_IDR4 

///////////////////////////////////////////////////////

#define TX_ADR_WIDTH    5    // 5 uints TX address width
#define RX_ADR_WIDTH    5    // 5 uints RX address width
#define TX_PLOAD_WIDTH  32  // 20 uints TX payload
#define RX_PLOAD_WIDTH  32   // 20 uints TX payload
unsigned char  TX_ADDRESS[TX_ADR_WIDTH]= {0xE7,0xE7,0xE7,0xE7,0xE7}; 
unsigned char  RX_ADDRESS[RX_ADR_WIDTH]= {0xE7,0xE7,0xE7,0xE7,0xE7}; 


/////////////// SPI(NRF24l01) commands////////////////

#define READ_REG        0x00   
#define WRITE_REG       0x20  
#define RD_RX_PLOAD     0x61   
#define WR_TX_PLOAD     0xA0   
#define FLUSH_TX        0xE1  
#define FLUSH_RX        0xE2   
#define REUSE_TX_PL     0xE3   
#define NOP             0xFF   

///////////////SPI(nrf24l01) registers///////////////////////////////////////

#define CONFIG          0x00  
#define EN_AA           0x01  
#define EN_RXADDR       0x02 
#define SETUP_AW        0x03  
#define SETUP_RETR      0x04  
#define RF_CH           0x05 
#define RF_SETUP        0x06  
#define STATUS          0x07  
#define OBSERVE_TX      0x08 
#define CD              0x09           
#define RX_ADDR_P0      0x0A  
#define RX_ADDR_P1      0x0B  
#define RX_ADDR_P2      0x0C  
#define RX_ADDR_P3      0x0D  
#define RX_ADDR_P4      0x0E  
#define RX_ADDR_P5      0x0F  
#define TX_ADDR         0x10 
#define RX_PW_P0        0x11  
#define RX_PW_P1        0x12  
#define RX_PW_P2        0x13  
#define RX_PW_P3        0x14 
#define RX_PW_P4        0x15  
#define RX_PW_P5        0x16  
#define FIFO_STATUS     0x17  

///////////////////////////////////////////////////////////////////////////

unsigned char    sta=0x00;
#define   RX_DR  (sta & 0x40)
#define   TX_DS  (sta & 0x20)
#define   MAX_RT  (sta & 0x10)


////////////////////////////////////////////////////////////////////////////


 void init_io_config()
 {
   PC_DDR_DDR5=0;
   PC_DDR_DDR6=1;
   PC_DDR_DDR7=1;
   
   PD_DDR_DDR2=1;
   PD_DDR_DDR3=1;
   PD_DDR_DDR4=0;
   
   
   PC_CR1_C15=1;
   PC_CR1_C16=1;
   PC_CR1_C17=1;
   
   PD_CR1_C12=1;
   PD_CR1_C13=1;
   PD_CR1_C14=0;
   PC_CR2 = 0x00; 
   PD_CR2 = 0x00;
 }

 void delayms(unsigned int count)
{
 unsigned int i,j;
 for(i=0;i<count;i++)
 for(j=0;j<450;j++);
}
 
unsigned char SPI_RW(unsigned char byte)
{
    unsigned char i;
    for(i=0;i<8;i++) // output 8-bit
    {
      MOSI=(byte & 0x80);
      byte = (byte << 1); 
      SCK = 1;
      byte|=MISO;
      SCK = 0;
    }
    return (byte);
      
}

unsigned char SPI_RW_Reg(unsigned char reg, unsigned char value)
{
 unsigned int  status;
 CSN = 0;                   // CSN low, init SPI transaction
 status = SPI_RW(reg);      // select register
 SPI_RW(value);             // ..and write value to it..
 CSN = 1;                   // CSN high again
 return(status);            // return nRF24L01 status uchar
}

unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char num)
{
 unsigned char status=0x00,byte_ctr=0;
 CSN = 0;            
 status = SPI_RW(reg);   
 for(byte_ctr=0; byte_ctr < num; byte_ctr++)
 {   
   SPI_RW(*pBuf++);
 }
 CSN = 1;           
 return(status);   
}



void init_NRF24L01(void)
{
  delayms(1);
  CE=0;    // chip enable
  CSN=1;   // Spi disable 
  SCK=0;   // Spi clock line init high
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); //set pwr up bit enable
 SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    
 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); 
 SPI_RW_Reg(WRITE_REG + EN_AA, 0x00);       
 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);   // enable pipe 0
 SPI_RW_Reg(WRITE_REG + SETUP_AW, 0x02);    // set up address width 5 bytes
 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x00);  // retransmission disabled
 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   //pwr=0dbm,datarate =1 mbps,lna:hcurr
 SPI_RW_Reg(WRITE_REG + STATUS, 0x02);          //
  SPI_RW_Reg(WRITE_REG + RF_CH, 0x2c);          //

 SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); //
 CE=1;               //make ce high
}


void SetTX_Mode(void)
{
 CE=0;
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     
 CE = 1; 
 delayms(1);
}
void nRF24L01_TxPacket(unsigned char * tx_buf)
{
  
 CE=0;   
 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); 
 SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH); 
 //while(TX_DS!=1);
 //SPI_RW_Reg(WRITE_REG + STATUS, 0x00);
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);

 CE=1;   
delayms(1);

 //SPI_RW_Reg(WRITE_REG + STATUS, 0x00);
 //sta = SPI_RW(STATUS);
}

void SetRX_Mode(void)
{
 CE=0;
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     
 CE = 1; 
 delayms(1);
}

unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char num)
{
 unsigned char  status,byte_ctr=0;
 
 CSN = 0;                      // Set CSN low, init SPI tranaction
 status = SPI_RW(reg);         // Select register to write to and read status uchar
 for(byte_ctr=0;byte_ctr < num; byte_ctr++)   
 pBuf[byte_ctr] = SPI_RW(0);     
 
 CSN = 1;                           
 
 return(status);                    // return nRF24L01 status uchar
}

unsigned char nRF24L01_RxPacket(unsigned char* rx_buf)
{
  unsigned char revale=0;
  SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     
  CE = 1;    
  sta=SPI_RW(STATUS);
  while(RX_DR);
  if(RX_DR)
  {
  CE = 0;    
  SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
  revale =1;  
 }
 SPI_RW_Reg(WRITE_REG + STATUS, 0x00);
 sta = SPI_RW(STATUS);
 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);
 return revale;
}



void main()
{
  unsigned char TxBuf[32]={0};   
//unsigned char RxBuf[32]={0};
  init_io_config();
  init_NRF24L01() ;
  while(1)
  {
  TxBuf[1] =0x55;
  SetTX_Mode();
  nRF24L01_TxPacket(TxBuf);
  TxBuf[2]=0x00;
  
 for(int i=0;i<2000;i++)
 {
   for(int j=0;j<1275;j++);
 }

  delayms(500);
  }
 /* SetRX_Mode();
  nRF24L01_RxPacket(RxBuf);*/
  
 }

for which i am using stm8s discovery board and iAR workbench.will you please tell me is this a right program as a transmitter

Thank you,

Pallavi

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Thu, 29 Jun 2017 08:39:09 GMT

hello sir, Thank you fr the elaboration about the conceptI am working on another project now.so the project on stm8s+nrf24l01 i have kept on hold.when i started working on this project based on stm8s+nrf24l01 will continue this discussion.At that time i need help.

Thank You,

Pallavi

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

ovrebekk — Thu, 29 Jun 2017 07:13:22 GMT

Hi
As you know the PRX will automatically send an ACK packet after receiving a packet from the PTX, to tell the PTX that the packet was successfully received.
If the ACK is not received by the PTX the PTX will assume that the packet was lost, and send the exact same packet one more time (up to 15 times maximum). This packet will have an identical payload, address and PID.
But some times the ACK could also get lost. In this case the PTX will resend the same packet, even though it was already received by the PRX. When this happens the PRX will recognize the retransmitted packet as being a duplicate, it will send an ACK to the PTX to tell it that the packet has been received, but it will not raise the RX_DR interrupt and will not put the packet into the RX FIFO (because it already did that earlier).
There is no timeout on this mechanism, so even if you send a new packet much later the packet will be discarded on the PRX side as a retransmit.
Normally this is not an issue since the PID is incremented every time you upload a new packet to the PTX, but if the nRF24L01 is reset in between each packet then the PID will always be the same. In this case you would have to either add some changing data in the payload, or make sure to send at least two packets in between each wakeup (then the PID will have different values, and the problem goes away).

Best regards
Torbjørn

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Thu, 29 Jun 2017 05:10:12 GMT

hello sir,

May be you are right cz i also think on that and finally made tha conclusion that is,may be Tx module is getting reseted after one transmission.you told that " If the payload content, address and PID is identical between packets then the packet will be discarded. " what does it mean i am not understanding this thing will you please elaborate.

Thank You,

Pallavi

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

ovrebekk — Wed, 28 Jun 2017 11:43:53 GMT

Can you try to add an incrementing counter in the packet and see if it solves the issue?

If it does then the problem is most likely that the nRF24L01 TX module is being reset between each packet, so that the packet is discarded in the receiver as a re-transmission.

If the payload content, address and PID is identical between packets then the packet will be discarded.

Best regards

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

pallavi — Wed, 28 Jun 2017 05:38:50 GMT

Hello sir,

i am not changing the payload i am using the given code as it is.

Pallavi

RE: how to make communication between two stm8s+nrf24l01 (ie.one(stm8s+nrf24l01) as transmitter and one(stm8s+nrf24l01) as receiver)?can anyone help

ovrebekk — Tue, 27 Jun 2017 08:40:12 GMT

Hi Pallavi

A quick test: Are you changing the payload for each packet, or is it always the same?

Best regards