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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/23972/cybersecurity-features-for-nrf52-chips</link><description>Good day! 
 I&amp;#39;m interesting in ability to support of some required Cybersecurity features by NRF52832 or/and NRF52840: 
 
 Is it possible to fully disable JTAG and/or SWD? 
 Is it possible to implement Flash protection (from rewriting/erasing/readaback</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 23 Jul 2019 14:21:02 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/23972/cybersecurity-features-for-nrf52-chips" /><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/200115?ContentTypeID=1</link><pubDate>Tue, 23 Jul 2019 14:21:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7ce41965-a769-439a-82a0-9f67d715ca15</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Hi Garret,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I apologize for the late reply.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The ARM Cortex M4 on nRF52840 does not have any trusted execution environment like the M33 on the nRF9160. Hence, we have focused on implementing a secure boot chain for the nRF9160 in the nRF Connect SDK based on MCUBoot, see&amp;nbsp;&lt;a href="http://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/mcuboot/index.html"&gt;http://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/mcuboot/index.html&lt;/a&gt;.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;We do therefore still&amp;nbsp; not have any sample code showing how to use the CC310 in a &amp;quot;secure boot-like&amp;quot; configuration, i.e. use the root key to verify the application prior to pasing execution to this.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The bootloader from the nRF5 SDK already uses the ACL to protect the bootloader upon boot and verifies the CRC of the application before passing execution to the application. Modifying this to use the CC310&amp;nbsp;should not be too much effort. Note the bootloader will have to write the Root key to the CC310 registers so the root key will then either have to be stored in flash or in an external secure element and then retreived by the bootloader upon boot.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/199079?ContentTypeID=1</link><pubDate>Wed, 17 Jul 2019 18:58:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4946189c-462c-453a-940a-0184a506372a</guid><dc:creator>Garrett</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/bjorn_2d00_spockeli"&gt;bjorn-spockeli&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;We don&amp;#39;t mind digging through documents, have an NDA with Nordic, and are nearing completion of a product we we are hoping to implement secure boot for.&lt;/p&gt;
&lt;p&gt;I would like to get ahold of any and all info regarding the CC310 implementation and options for secure boot in NRF52840.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.mbed.com/built-with-mbed/multisensor-industrial-asset-monitor"&gt;https://www.mbed.com/built-with-mbed/multisensor-industrial-asset-monitor&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/140922?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 07:41:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f3c17a33-bfdb-43b4-9192-b96d6947e1d9</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Hi Jamie,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I am afraid that we do not yet have&amp;nbsp;an example showing&amp;nbsp;a Secure Boot implementation with the features mentioned in my previous comment. The ACL peripheral should be straightforward to use, but the CC310 library part is a bit more complex and we do not have a lot of examples or a lot of documentation.&lt;/p&gt;
&lt;p&gt;It should be&amp;nbsp;possible to implement secure boot without using the CC310, i.e. using SW based crypto libaries instead of HW crypto accelerators and using the ACL to&amp;nbsp;restrict access to the&amp;nbsp;Root Key and the CC310 register.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/140330?ContentTypeID=1</link><pubDate>Tue, 17 Jul 2018 08:02:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0a2017ce-b3ed-42de-8dc0-5895af983184</guid><dc:creator>jm_laird</dc:creator><description>&lt;p&gt;Hi Bj&amp;oslash;rn,&lt;/p&gt;
&lt;p&gt;Are you able to give any example code of how to use this functionality and explain it&amp;#39;s restrictions e.g. if only the normal CC310 library can use it or if others can?&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/139232?ContentTypeID=1</link><pubDate>Fri, 06 Jul 2018 10:48:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6cb42a82-8024-4707-ba8c-ea6fb71cc6a8</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Happy to help :)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/139218?ContentTypeID=1</link><pubDate>Fri, 06 Jul 2018 09:33:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:427c1577-2886-4504-bcd0-e1b224cd2b54</guid><dc:creator>bdjukic</dc:creator><description>&lt;p&gt;Hi&amp;nbsp;Bj&amp;oslash;rn,&lt;/p&gt;
&lt;p&gt;Thanks for the prompt response and detailed answer! This is exactly what I was looking for.&lt;/p&gt;
&lt;p&gt;Have a great weekend,&lt;/p&gt;
&lt;p&gt;B.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/139201?ContentTypeID=1</link><pubDate>Fri, 06 Jul 2018 08:43:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:171975e4-c112-4b6a-a2e2-eeae886b67ab</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/bdjukic"&gt;bdjukic&lt;/a&gt;: We have exposed the CryptoCell&amp;nbsp;registers&amp;nbsp;for storing the Device Root Key within the CryptoCell, see&amp;nbsp;&lt;a title="nRF52 Series" href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.ps/cryptocell.html?resultof=%22%72%6f%6f%74%22%20%22%74%72%75%73%74%22%20"&gt;CRYPTOCELL — ARM TrustZone CryptoCell 310&lt;/a&gt;, which is then used by the CryptoCells AES HW. This&amp;nbsp;Device Root Key can then be used by the secure boot code that you can put in the bootloader and then protect using the ACL peripheral, see&amp;nbsp; &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.ps/acl.html?resultof=%22%41%43%4c%22%20%22%61%63%6c%22%20"&gt;ACL — Access control lists&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/139134?ContentTypeID=1</link><pubDate>Thu, 05 Jul 2018 14:27:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d07160e1-21ae-437c-8228-7703eabfc27b</guid><dc:creator>bdjukic</dc:creator><description>&lt;p&gt;Any update on the CryptoCell Root-of-Trust API?&lt;/p&gt;
&lt;p&gt;Thanks!&lt;/p&gt;
&lt;p&gt;B.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94377?ContentTypeID=1</link><pubDate>Wed, 02 Aug 2017 09:14:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9642eb18-59ed-4d71-a0b5-af0163ee834f</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;No, we do not have any resources showing how to use the Cryptocell for Root-of-Thrust yet. The current SDK examples, found &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.sdk5.v13.1.0/cryptocell_example.html?cp=4_0_0_4_8"&gt;here&lt;/a&gt;, only shows how to use it for hardware-accelerated cryptography. We need some time to add the ARM CryptoCell libraries into our SDK, but rest assured, the support will come.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94376?ContentTypeID=1</link><pubDate>Wed, 02 Aug 2017 09:05:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2e534068-f003-4fc3-a4ba-eb63bca6578c</guid><dc:creator>endnode</dc:creator><description>&lt;p&gt;Interesting! Any resource to learn how exactly this Secure Boot works (= what HW features are on nRF52840 except crypto acceleration itself)? Is there any execute lock register/module? What can be run and from what &amp;quot;code&amp;quot; before executing single instruction stored in flash?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94375?ContentTypeID=1</link><pubDate>Wed, 02 Aug 2017 08:52:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4aa7dc26-9be3-4872-af28-acb6fae5e0ac</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;@endnode: You are correct that the ARM CryptoCell-310 on the NRF52840 allows you to do Secure Boot, and that this has not been implemented into our Secure Bootloaders yet, i.e. we only allow updates from trusted sources, but we do not verify that the code that is about to be executed against some key/signature/checksum.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94370?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 12:24:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:56837057-a9a8-4832-9220-07c3633d9ab4</guid><dc:creator>endnode</dc:creator><description>&lt;p&gt;From &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.ps/cc_chapter.html?cp=2_0_0_52#cc_frontpage"&gt;what I see in nRF52840 Product Specification (Objective = preliminary) it looks like CryptoCell is just HW accelerator&lt;/a&gt; for certain algorithms (= functions) which has dedicated RAM but all the code is executed through library which is loaded in standard user-space (flash). No sign of &amp;quot;Secure Boot&amp;quot; (these diagrams are probably generic ARM CryptoCell-310 block diagrams where Secure Boot is with dashed lines so probably optional and implementation dependent), almost looks like TrustZone is only TM/Copyright technology to give you better feeling (don&amp;#39;t want to be mean, it has nice features and in any form - even just this bare HW crypto accelerator - it helps, but it&amp;#39;s not uncommon in this &amp;quot;cybersecurity&amp;quot; space to sell just buzzwords and trademarks...)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94374?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 12:18:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:faa3ddc8-9efd-488c-88cd-063099ff7baf</guid><dc:creator>endnode</dc:creator><description>&lt;p&gt;You are right, there seems to be this phrase however there were no resources to that when I was trying to evaluate back in winter during release time of preview DK. All what I see in nRF5 SDk V13.1.0 is Secure bootloader for Nordic Device Firmware Upgrade, no real secure boot (= attestation of memory and other HW components before any custom SW is run on MCU) as far as I cn see... but I would very much like to learn the details if I&amp;#39;m wrong!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94373?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 12:13:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3383881e-e34a-4507-93b1-cb420987f3a8</guid><dc:creator>Ildar</dc:creator><description>&lt;p&gt;Thank you very much! Your answers are very helpful!&lt;/p&gt;
&lt;p&gt;I also read that nRF52840 has ARM Crypto Cell with secure boot support &lt;a href="https://www.nordicsemi.com/eng/Products/ARM-CryptoCell-310"&gt;www.nordicsemi.com/.../ARM-CryptoCell-310&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Also there are few examples in SDK v13 named Secure Boot, I will try to understand them. It is better than nothing :)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94372?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 11:50:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3a50170e-8b4c-44e7-a8c8-2c18c785dcde</guid><dc:creator>endnode</dc:creator><description>&lt;p&gt;Oh yes, TrustZone, it looks so secure on these colorful boxes, doesn&amp;#39;t it?:) From my point of view you are putting hope into things which sound better on paper then in the lab during penetration tests. Anyway back to nRF52: no, it doesn&amp;#39;t provide any HW routines to verify some memory against some key/signature/checksum. As I said, you could implement something like that in your APP FW but that won&amp;#39;t be the first code running on the MCU. To be as close to start-up as possible you could develop your stack which would reside at the beginning of flash (normally there is Nordic stack with their MBR segment) and write this in early code (typically in ASM). But still there are doubts how much is such SW protection valid when the HW itself isn&amp;#39;t protected against things like glitch/fault attacks, EM eavesdropping etc...&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94371?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 11:44:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:daefeace-24fe-41d4-a3f7-d4779d9cccd9</guid><dc:creator>Ildar</dc:creator><description>&lt;p&gt;Oh that&amp;#39;s ok! Many thanks to you.&lt;/p&gt;
&lt;p&gt;And how about support something like ARM TrustZone? &lt;a href="https://www.arm.com/products/security-on-arm/trustzone"&gt;www.arm.com/.../trustzone&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;I need to prevent any unauthorized or maliciously modified software from running.&lt;/p&gt;
&lt;p&gt;Does nRF52832 or nRF52840 support something like this? &lt;a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.prd29-genc-009492c/CACGCHFE.html"&gt;infocenter.arm.com/.../index.jsp&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cybersecurity features for NRF52 chips</title><link>https://devzone.nordicsemi.com/thread/94369?ContentTypeID=1</link><pubDate>Tue, 01 Aug 2017 11:18:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5da90b7c-af5c-4ed8-86d1-648df253495b</guid><dc:creator>endnode</dc:creator><description>&lt;p&gt;(oh lord, CS buzzword;)&lt;/p&gt;
&lt;p&gt;Hi,&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Yes, &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/uicr.html?cp=2_1_0_13_0_61#register.APPROTECT"&gt;read about that in the product specification&lt;/a&gt;.&lt;/li&gt;
&lt;li&gt;Yes, see the link above and &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/bprot.html?cp=2_1_0_11#concept_gdr_qlx_vr"&gt;this&lt;/a&gt;.&lt;/li&gt;
&lt;li&gt;What do you mean by that? Neither nRF52832 nor nRF52840 has any HW security feature to protect tempering with the processor/memory/inputs during the run-time so how you would achieve any security during the boot? The only thing you could use is ARM CryptoCell features for HW accelerated crypto in nRF52840 but that won&amp;#39;t guarantee that FW you are going to execute is &amp;quot;genuine&amp;quot;. You can indeed implement it in your app code (e.g. store some checksum in one-time programmable UICR registers and then as first action verify that flash content - or at least content of some flash pages - matches that). But without any HW protection you cannot be sure that someone haven&amp;#39;t hacked flash read/write protection so it has very limited effect...&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;&lt;strong&gt;Edit 2-july-2017:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Thanks to Bjørn&amp;#39;s confirmation there actually &lt;strong&gt;IS&lt;/strong&gt; Secure Boot possibility with ARM CryptoCell Root-of-Trust feature on nRF52840, more resources on that to be released;) Still to be seen how really temper-resistant this mechanism is.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>