Generating Pulses

RE: Generating Pulses

Sigurd — Tue, 05 Sep 2017 09:01:03 GMT

The PWM module implements a counter that is counting up to the countertop value you set. In my example code the PWM module is counting up to the value 100. I have set the flag NRF_DRV_PWM_FLAG_LOOP, so it will restart the counting when it comes to 100 and start over from 0.

While the PWM module is counting on it’s way to 100, it will reach the number set by the sequence value. This can in my example be minimum 0 and max 100. When this value is reached, the PWM output signal will be toggled/reversed. Let’s say that the sequence value is set to 60, and that the PWM started with a low signal(0 volt). It will then switch to output a high signal(e.g. 3V) when it reach 60, and be high(3V) until it reaches 100(countertop value).

The bit[15] in seq_value determines if we start with the signal high or low(if we should have a rising or falling edge when we reach the seq_value). If you set the bit[15] to 0, the signal starts low, and goes high when you reach the seq_value. If you set the bit[15] to 1, the signal starts high and goes low.

More information can be found here.

RE: Generating Pulses

Kerem — Mon, 04 Sep 2017 20:45:22 GMT

I feel sorry to ask this but I did not understand the 'polarity' concept. What exactly is it?

RE: Generating Pulses

Sigurd — Mon, 04 Sep 2017 19:03:10 GMT

If you are first starting you project now, I would recommend downloading the newest SDK from here, and use SoftDevice S132 v5.0.0

RE: Generating Pulses

Sigurd — Mon, 04 Sep 2017 16:00:17 GMT

Hi,

I will strongly recommend to use the nrf_drv_pwm functions, and not use the PWM HAL(Hardware access layer) functions directly. Note that you are overflowing the COUNTERTOP register by using the value 64000. Max value is 32767.

Also note that with the sequence duty cycle values the most significant bit[15] denotes the polarity. So if you want seq_value 0 to correspond to 0 V, you need to set bit 15 to 1. E.g. by using bitwise OR.

seq_values->channel_0 = duty_cycle | 0x8000;

Code example that shows how to set a duty cycle between 0 and 100 % that uses 10kHz PWM:

#include <stdio.h>
#include <string.h>
#include "nrf_drv_pwm.h"
#include "app_util_platform.h"
#include "app_error.h"
#include "boards.h"
#include "bsp.h"
#include "nrf_drv_clock.h"
#include "nrf_delay.h"


#define OUTPUT_PIN 16

static nrf_drv_pwm_t m_pwm0 = NRF_DRV_PWM_INSTANCE(0);

// Declare variables holding PWM sequence values. In this example only one channel is used 
nrf_pwm_values_individual_t seq_values[] = {0, 0, 0, 0};
nrf_pwm_sequence_t const seq =
{
    .values.p_individual = seq_values,
    .length          = NRF_PWM_VALUES_LENGTH(seq_values),
    .repeats         = 0,
    .end_delay       = 0
};


// Set duty cycle between 0 and 100%
void pwm_update_duty_cycle(uint8_t duty_cycle)
{

    // Check if value is outside of range. If so, set to 0%
    if(duty_cycle >= 100)
    {
        seq_values->channel_0 = 0;
    }
    else
    {
        
        seq_values->channel_0 = duty_cycle | 0x8000; // Change polarity 
    }
   
    nrf_drv_pwm_simple_playback(&m_pwm0, &seq, 1, NRF_DRV_PWM_FLAG_LOOP);
}

static void pwm_init(void)
{
    nrf_drv_pwm_config_t const config0 =
    {
        .output_pins =
        {
            OUTPUT_PIN, // channel 0
            NRF_DRV_PWM_PIN_NOT_USED,             // channel 1
            NRF_DRV_PWM_PIN_NOT_USED,             // channel 2
            NRF_DRV_PWM_PIN_NOT_USED,             // channel 3
        },
        .irq_priority = APP_IRQ_PRIORITY_LOWEST,
        .base_clock   = NRF_PWM_CLK_1MHz,
        .count_mode   = NRF_PWM_MODE_UP,
        .top_value    = 100,
        .load_mode    = NRF_PWM_LOAD_INDIVIDUAL,
        .step_mode    = NRF_PWM_STEP_AUTO
    };
    // Init PWM without error handler
    APP_ERROR_CHECK(nrf_drv_pwm_init(&m_pwm0, &config0, NULL));

}


int main(void)
{

    // Start clock for accurate frequencies
    NRF_CLOCK->TASKS_HFCLKSTART = 1; 
    // Wait for clock to start
    while(NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) ;

    pwm_init();
    pwm_update_duty_cycle(40);

    for (;;)
    {

    }
}


/** @} */