nRF52832 SPIS PAN 109 Workaround Issue

RE: nRF52832 SPIS PAN 109 Workaround Issue

Bill Finger — Mon, 18 Sep 2017 12:41:02 GMT

Thanks, Jørgen. I'm glad to see this is not unexpected. Since I have a solution implemented I think I will persevere with low power mode due to its reduced power consumption.

RE: nRF52832 SPIS PAN 109 Workaround Issue

Jørgen Holmefjord — Mon, 18 Sep 2017 08:38:08 GMT

If you are running in Low Power mode, this is given by the electrical specifications of the nRF52832 SPIS peripheral:

Time from RELEASE task to ready to receive/transmit (CSN active), Low power mode:

t_SPIS,LP,START = (t_SPIS,CL,START + t_START_HFINT) µs = (0.125 + 3) µs = 3.125 µs

If you configure the chip in constant latency mode, the delay should be limited:

Time from RELEASE task to receive/transmit (CSN active), Constant latency mode:

t_SPIS,CL,START = 0.125 µs

RE: nRF52832 SPIS PAN 109 Workaround Issue

Bill Finger — Fri, 15 Sep 2017 14:15:13 GMT

After some further experimentation, I found the solution. The chip select was coming down only 750 nanoseconds before the start of SCLK. If on the host I delayed the start of transmission by 3 additional microseconds, the workaround worked. Otherwise, the nRF52832 did not respond in time.