RE: UARTE FLUSHRX&RXFIFO

Stayhungry — Mon, 30 Oct 2017 02:58:07 GMT

Thanks,Sigurd.

I have seen this information, but I have some problems.

1, if the RX FIFO does not have data, which means no overflow,and I use TASK_FLUSHRX, then in the next EVENTS_ENDRX interrupt read .AMOUT get what? I found that it was the last EVENTS_ENDRX value, not 0. This is a normal situation, or is my operation wrong?

2, I use the hardware flow control, according to S132_SD_v5.0 82 pages, PostProcessing typical 90us, assuming that at this time I use 1M baud rate uarte to receive data (a byte about 10us), due to uarte interrupt by Softdevice timing- critical preemption, then there will be 2 bytes into the RX FIFO (6byte RX FIFO Size - 4byte RTS deactivated), ble_uart_app there are ways to deal with these two bytes?Because in ble_app_uart, I did not find the function associated with TASK_FLUSHRX.

RE: UARTE FLUSHRX&RXFIFO

Sigurd — Sun, 29 Oct 2017 10:04:23 GMT

Hi,

You should get a EVENTS_ENDRX event when it has filled up the RX buffer. For every byte received, you should get a EVENTS_RXDRDY event. After you trigger the TASKS_FLUSHRX task, you should get a EVENTS_ENDRX event.

To make sure that this data does not overwrite data in the RX buffer, the RX buffer should be emptied or the RXD.PTR should be updated before the TASKS_FLUSHRX task is triggered.

Note that when you are using the UARTE, the .PTR and .MAXCNT registers are double-buffered.

See this infocenter page for more information: infocenter.nordicsemi.com/.../uarte.html