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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>System Off &amp;amp; GPIO pull-up / pull-down</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/2768/system-off-gpio-pull-up-pull-down</link><description>If the nRF51 chip is in System Off state, do the GPIO pins retain the pull-ups or pull-downs? If so, what value do they have and how much current can they sink or source? 
 This post gets close to answering, but not exactly: devzone.nordicsemi.com/.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 18 Jun 2014 08:35:12 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/2768/system-off-gpio-pull-up-pull-down" /><item><title>RE: System Off &amp; GPIO pull-up / pull-down</title><link>https://devzone.nordicsemi.com/thread/10694?ContentTypeID=1</link><pubDate>Wed, 18 Jun 2014 08:35:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:27cc76c1-d4a0-46d3-a0a9-50be9ec5f768</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;Yes, the pin will be pulled low in System Off as the GPIO configuration is retained in System Off&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: System Off &amp; GPIO pull-up / pull-down</title><link>https://devzone.nordicsemi.com/thread/10693?ContentTypeID=1</link><pubDate>Thu, 12 Jun 2014 13:25:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9d09c0c3-b28e-4f67-b8cc-7f139ef54896</guid><dc:creator>Jason De Lorme</dc:creator><description>&lt;p&gt;Thank you, Stefan.  To be clear, when the chip is in System Off and I have previously configured pull-down on a pin, will that pin have 0 volts (LOW) or will it float? Specifically I&amp;#39;m looking at controlling an external device that needs the pin to be pulled low when the chip is in System Off and I need to know if we have to add our own pull down resistor on our board or if we could rely on the nRF51 pull down resistor?&lt;/p&gt;
&lt;p&gt;Thank you!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: System Off &amp; GPIO pull-up / pull-down</title><link>https://devzone.nordicsemi.com/thread/10692?ContentTypeID=1</link><pubDate>Thu, 12 Jun 2014 11:21:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:af2ecf19-247e-4194-bb0d-4c0ee574eee3</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;Hi Jason&lt;/p&gt;
&lt;p&gt;All GPIO configuration is retained is System Off. Perhaps you could benefit from looking at the &lt;a href="https://github.com/NordicSemiconductor/nrf51-powerdown-examples"&gt;system-off-wakeup-on-gpio example&lt;/a&gt; which shows how pins are configured to wake up from System Off.&lt;/p&gt;
&lt;p&gt;The default sink/source current is 0.5mA. This can be configured however by writing to the PIN_CNF register for a specfic pin, bits D, see section 13.2.8 in nRF51 Series Reference Manual v2.1. To see specifically how this is done in code, look at the definition for the nrf_gpio_cfg_sense_input function in nrf_gpio.h in the above linked example. Standard drive is 0.5mA max, high drive is 5mA max. Max combined drive for all GPIO&amp;#39;s is 15mA.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>