nrf52 disable debug by reset with eeprom locked

RE: nrf52 disable debug by reset with eeprom locked

Sigurd — Wed, 10 Jan 2018 18:51:53 GMT

It could be that the DIF is not being reset. Try the solution in this post

RE: nrf52 disable debug by reset with eeprom locked

endnode — Wed, 10 Jan 2018 17:59:46 GMT

Just a note: if you can do the read then chip isn't read-back protected (meaning that also SWD functions are not blocked). Still if debugger isn't active power consumption should go down to proper level.

RE: nrf52 disable debug by reset with eeprom locked

puck — Wed, 10 Jan 2018 16:44:33 GMT

@endnode Yes, I can read back the memory after removing/reattaching the cable. I did program + lock, remove the cable immediately and then triggered a reset with external pin, this doesn't change anything.

RE: nrf52 disable debug by reset with eeprom locked

endnode — Wed, 10 Jan 2018 09:29:15 GMT

OK and then after grounding RESETn and removing/attaching SWD cable you can or you cannot read that memory? Also can you try how power consumption works if you schedule SW reset from within the FW (e.g. 30s after FW boots the first time) and you program + lock the FW and then remove the cable immediately?

RE: nrf52 disable debug by reset with eeprom locked

puck — Wed, 10 Jan 2018 09:14:07 GMT

@endnode We use the pin RESETn and send a memwr with val 21 to both 0x10001200 and 10001204, and SWD debugger is connected to RESETn, VCC, SWDIO, SWCLK, DBG_RX, DBG_TX (uart interface) and GND. Physically trying to trigger a reset by connecting to pin to GND does trigger a reset of our firmware but does not reduce the power consumption to an acceptable value.

RE: nrf52 disable debug by reset with eeprom locked

endnode — Wed, 10 Jan 2018 09:00:38 GMT

That is strange, PIN reset should work. Are you sure that reset PIN isn't disabled in FW and that your SWD debugger is correctly connected to all PINs?

RE: nrf52 disable debug by reset with eeprom locked

puck — Wed, 10 Jan 2018 09:00:14 GMT

@endnode see my edit. I understood the question of Matt as: "Does is still withdraw current once the JLinkk cable as been unplugged" and the answer is yes.

RE: nrf52 disable debug by reset with eeprom locked

endnode — Wed, 10 Jan 2018 08:26:16 GMT

So logical conclusion is that it's your FW which draws that current even without having SWD debugger attached (= enabled).

RE: nrf52 disable debug by reset with eeprom locked

puck — Tue, 09 Jan 2018 23:32:31 GMT

@Matt measurements were done with and without the debugger connected to it. Same observations in both cases.

RE: nrf52 disable debug by reset with eeprom locked

Matt — Tue, 09 Jan 2018 22:02:09 GMT

Dumb question (as I don't know much about debug enabled mode): when you meansured the 1.3mA current consumption you did not have the JLink debugger connected to your custom board through the SWD interface right?