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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52840 SPIM3 @32MHz functionnal on Engineering sample B?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/30374/nrf52840-spim3-32mhz-functionnal-on-engineering-sample-b</link><description>HI there, 
 
 I read somewhere here that the SPIM3 bus would be capable of 32MHz operations in the &amp;quot;next&amp;quot; chip revision (that was 6 months ago). 
 Could you confirm that it is now the case with the Engineering Sample B? 
 
 Thank you, 
 Mickael</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 28 Feb 2018 17:58:24 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/30374/nrf52840-spim3-32mhz-functionnal-on-engineering-sample-b" /><item><title>RE: nRF52840 SPIM3 @32MHz functionnal on Engineering sample B?</title><link>https://devzone.nordicsemi.com/thread/122358?ContentTypeID=1</link><pubDate>Wed, 28 Feb 2018 17:58:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ae944ed-69af-4a11-bdb2-b828bc6d77e1</guid><dc:creator>Mickael</dc:creator><description>&lt;p&gt;Hi Hakon, another couple this topic too:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Are there specific pins to be used to get the best of SPIM3? Or at least, could you share what pins were used to validate it?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I hope they are not shared with the specific QSPI pins as we are planning to use both.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Cheers,&lt;/p&gt;
&lt;p&gt;Mickael&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 SPIM3 @32MHz functionnal on Engineering sample B?</title><link>https://devzone.nordicsemi.com/thread/120528?ContentTypeID=1</link><pubDate>Mon, 12 Feb 2018 09:21:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8def1df1-36d8-4faf-a3e1-314e3081ffe3</guid><dc:creator>Mickael</dc:creator><description>&lt;p&gt;Super thorough answer - Thanks a lot you, Hakon.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 SPIM3 @32MHz functionnal on Engineering sample B?</title><link>https://devzone.nordicsemi.com/thread/120510?ContentTypeID=1</link><pubDate>Mon, 12 Feb 2018 08:18:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5e14012f-e91b-4c4a-a134-64d910371a9e</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The SPIM3 is present for engineering B, but it has these erratas:&lt;/p&gt;
&lt;p&gt;&lt;a title="This anomaly applies to IC Rev. Engineering B, build codes QIAA-BA0, QIAA-BB0, CKAA-AA0." href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.EngB.errata/dita/errata/nRF52840/EngineeringB/latest/anomaly_840_189.html#anomaly_840_189"&gt;&lt;span&gt;RX buffer error at 32 MHz operation&lt;/span&gt;&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a title="This anomaly applies to IC Rev. Engineering B, build codes QIAA-BA0, CKAA-AA0." href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.EngB.errata/dita/errata/nRF52840/EngineeringB/latest/anomaly_840_193.html#anomaly_840_193"&gt;&lt;span&gt;SPIM3 does not generate EVENTS_END and halts if suspended during last byte&lt;/span&gt;&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a title="This anomaly applies to IC Rev. Engineering B, build codes QIAA-BA0, QIAA-BB0, CKAA-AA0." href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.EngB.errata/dita/errata/nRF52840/EngineeringB/latest/anomaly_840_174.html#anomaly_840_174"&gt;&lt;span&gt;SPIM3 events incorrectly connected to the PPI&lt;/span&gt;&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The first one is the most crucial for 32M operation, effectively limiting the operation frequency down to 16M. You should have engineering C if you need to evaluate 32MHz SPI operations.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For Engineering C, the errata #189 &amp;quot;RX buffer error at 32 MHz operation&amp;quot; is fixed, as shown in this section of the errata document:&lt;/p&gt;
&lt;p&gt;&lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.EngC.errata/dita/errata/nRF52840/EngineeringC/latest/err_840_fixed.html?cp=2_0_1_0_2"&gt;http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52840.EngC.errata/dita/errata/nRF52840/EngineeringC/latest/err_840_fixed.html?cp=2_0_1_0_2&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Cheers,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>