Use SAADC Limit to clear GPIO via PPIhttps://devzone.nordicsemi.com/f/nordic-q-a/30824/use-saadc-limit-to-clear-gpio-via-ppiHello, I&#39;m attempting to use a high-limit reached event from the SAADC to trigger the clearing of a GPIO. My wish is to disable this GPIO with the lowest possible latency, avoiding the need for the CPU to manually clear the pin. However, my currenten-USTelligent Community 13Fri, 22 Jun 2018 17:04:13 GMTRE: Use SAADC Limit to clear GPIO via PPIhttps://devzone.nordicsemi.com/thread/137270?ContentTypeID=1Fri, 22 Jun 2018 17:04:13 GMT137ad170-7792-4731-bb38-c0d22fbe4515:5a51d1b9-78b4-494c-8268-4eda1774aa50juliantbrown<p>That was an oversight on my part. We were also logging values from the SAADC for debug purposes, but for a release solution, the COMP/LPCOMP is the right call. This worked perfectly. Thanks!</p><div style="clear:both;"></div>RE: Use SAADC Limit to clear GPIO via PPIhttps://devzone.nordicsemi.com/thread/122252?ContentTypeID=1Wed, 28 Feb 2018 10:14:34 GMT137ad170-7792-4731-bb38-c0d22fbe4515:bdd4ddfd-c777-45f1-9e6b-4f9cb2175697Kenneth<p>I do not see any particular reason why this should not work, what SDK version are you using and can it be that the SAADC event is already set?</p><div style="clear:both;"></div>RE: Use SAADC Limit to clear GPIO via PPIhttps://devzone.nordicsemi.com/thread/121855?ContentTypeID=1Sat, 24 Feb 2018 10:31:33 GMT137ad170-7792-4731-bb38-c0d22fbe4515:008713c4-a50a-48c6-b037-8bcc7ae1630eTurbo J<p>Why do you want to use the SAADC instead of the COMP or LPCOMP peripherial? The SAADC must be kept running <strong>and</strong> sampling all the time, which implies significant current consumtion.</p><div style="clear:both;"></div>