BOR and power Fail comparator

RE: BOR and power Fail comparator

Sergey_Kolen — Tue, 06 Mar 2018 08:01:40 GMT

Dear Hakon,

your answer will be very critical , maybe we will give up this IC and switch to another option , the questions:

1. if riste time from 0 to 1.7 is 100mS , so the system can be stucked forever ? or after some delay time the system will be reseted and renew a powered up sequence?

2. the maximal delay that mentioned at datasheet is 60mSec from 0v to 1.7v, can you please explain when (under which supply voltage) the timer of 60mSec is started?

3. if rise time is >60msec , maybe you have solution that can help us with good powerred up sequence?

thanks

RE: BOR and power Fail comparator

Håkon Alseth — Mon, 05 Mar 2018 11:16:09 GMT

Hi,

[quote user="Sergey_Kolen"]you guarantee me that if rise time from 0 to 1.7 is >60mSec that system will be powered up?[/quote]

No. This is out-of-spec. What I am saying is that we have not verified this scenario and cannot guarantee that it will work in all corner-cases.

[quote user="Sergey_Kolen"]1. There is internal comparator (power fail comparator ?) that once supply voltage not reached to 1.7v than system at reset state?[/quote]

Power-on-Reset (POR) will keep the chip in reset-state a given time after 1.7V level is reached.

[quote user="Sergey_Kolen"]once supply voltage reached to 1.71v so system immediately ready (bootloader start run) or there is some delay?[/quote]

Once 1.7V is reached, the nRF will still be in reset for a period of time, which will depend on your power-supply rise-time.

As an example, if your rise time from 0V to 1.7V is 1 microsecond, the nRF is kept in reset for a typical time of 1 ms:

http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52832.ps.v1.1%2Fpower.html&cp=2_1_0_17_9_1&anchor=unique_744469603

[quote user="Sergey_Kolen"] why supply rise time is maximal 60msec? if we know that onse voltage under 1.7 the system is on reset state, the system will stay at reset as long as VDD=1.7v .[/quote]

This is a restriction of the hardware, and test-level of the chip. We have not designed the chip for use-cases where the VDD rises very slow.

[quote user="Sergey_Kolen"][/quote]

5. according to the datasheet

"A step increase in supply voltage of 300 mV or more, with rise time of 300 ms or less, within the valid supply range, may result in a system reset."

so for example if I use cr2032 battery and supply voltage (VDD) reached to 1.7v , if rise time from 1.7 to 3 is 100mS so this scenario may result of system reset?

It is the rise-time from 0 to VDD_MIN (1.7V for nRF52832) that is critical. If this time exceeds 60 ms, then I cannot state what the side-effects will be.

Best regards,

Håkon

RE: BOR and power Fail comparator

Sergey_Kolen — Mon, 05 Mar 2018 10:49:59 GMT

Dear Hakon,

sorry but I not understand.

1. There is internal comparator (power fail comparator ?) that once supply voltage not reached to 1.7v than system at reset state?

2. once supply voltage reached to 1.71v so system immediately ready (bootloader start run) or there is some delay?

3. why supply rise time is maximal 60msec? if we know that onse voltage under 1.7 the system is on reset state, the system will stay at reset as long as VDD=1.7v .

4. what happend at time when vdd reached from 0v to 1.7v? the system at reaset and nothing is work because the POF comparator hold all system at reset state, so why delay time of 60msec is important?

5. according to the datasheet

"A step increase in supply voltage of 300 mV or more, with rise time of 300 ms or less, within the valid supply range, may result in a system reset."

so for example if I use cr2032 battery and supply voltage (VDD) reached to 1.7v , if rise time from 1.7 to 3 is 100mS so this scenario may result of system reset?

RE: BOR and power Fail comparator

Sergey_Kolen — Mon, 05 Mar 2018 09:57:29 GMT

hi what do you mean with this answer " Yes, that is very likely, but you will then be operating out-of-spec, meaning that we have not verified this scenario with the nRF52832."

you guarantee me that if rise time from 0 to 1.7 is >60mSec that system will be powered up?

thanks

RE: BOR and power Fail comparator

Håkon Alseth — Mon, 05 Mar 2018 09:08:28 GMT

Hi,

[quote user="Sergey_Kolen"]1. for example if my power up is ~100mSec, so system is will still powered up?[/quote]

Yes, that is very likely, but you will then be operating out-of-spec, meaning that we have not verified this scenario with the nRF52832.

The maximum recommended rise time is 60 ms, as described here:

http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/recommended_op_conditions.html?cp=2_1_0_5#concept_vng_xls_2q

[quote user="Sergey_Kolen"]2. what mean this sentance : may not function properly[/quote]

It means that we have not verified that a rise-time of > 60 ms will work properly, and therefore cannot guarantee that it will work.

Note that this restriction is for the VDD_NRF rise-time from 0 V up to 1.70 V.

Best regards,

Håkon

RE: BOR and power Fail comparator

Sergey_Kolen — Sun, 04 Mar 2018 10:36:07 GMT

Hi,

1. for example if my power up is ~100mSec, so system is will still powered up?

According to the datasheet "6 Recommended operating conditions"

2. what mean this sentance : may not function properly

RE: BOR and power Fail comparator

Håkon Alseth — Fri, 02 Mar 2018 07:09:41 GMT

It is directly related to the rise-time of your power supply.

If you have a quick power supply that rises from 0V -> VDD_NRF_MIN in less than 10 microseconds, the chip will be held in reset for a shorter period than if the power-supply uses 1 ms to rise.

Cheers,

Håkon

RE: BOR and power Fail comparator

Sergey_Kolen — Thu, 01 Mar 2018 13:48:29 GMT

thank you for this elegant answers.

regarding "tpor" , this is configurable time?

thanks

RE: BOR and power Fail comparator

Håkon Alseth — Wed, 28 Feb 2018 13:58:10 GMT

Hi Sergey,

I took the liberty of modifying your curve:

Here's two states, one on the downward slope (1), which will generate a brown-out-detection

and the upwards slope (2), which will start a power-on-reset (POR).

The device will go out of POR mode after the VDD_NRF has reached 1.7V _and_ the parameter "tpor" has elapsed.

The nRF will be kept in reset for a given amount of time after VDD_NRF >= 1.7V, based on the rise-time of your power supply, as specified here:

http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/power.html?cp=2_1_0_17_9_1#unique_744469603

[quote user=""]1. what the time and stablle value of voltage is mandatory for start process of FW upload from internal FLASH to RAM ? (I think that the FW run on the RAM not on the FLASH)[/quote]

The firmware is located in flash. The CPU will start executing after "tpor" has elapsed, and will setup your RAM based on your program located in flash.

[quote user=""] 2. what happened while FW uploaded from internal FLASH to RAM and some drop occured, so bootloader will be restart uploading process ?[/quote]

If a bootloader (DFU) process is on-going and the power-supply is disrupted, you will be RESET and boot back into the bootloader.

In this case the bootloader will know where it was in the process, and continue from there.

[quote user=""]3. bootloader have some CRC checking about uploaded FW?[/quote]

The DFU checks it's own settings area to validate the current installed application (CRC checksum) and see what state it is in.

If there has been a DFU-process that has been disrupted, it will detect this in the bootloader settings located in flash.

Best regards,

Håkon