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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/33833/nrf52840-maximum-i2s-settings</link><description>I had planned on using the nRF52840 I2S peripheral in Nordic Master mode to either produce a 31.25 kHz sampling rate, or a 62.5 kHz sampling rate for my application. 
 There seems to be a discrepancy in your datasheet. Looking at the V1.0 spec, on Table</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 03 May 2018 06:47:07 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/33833/nrf52840-maximum-i2s-settings" /><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130723?ContentTypeID=1</link><pubDate>Thu, 03 May 2018 06:47:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9c24936f-74f8-4c7d-ac7c-54360ba9fd94</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;Most likely, it&amp;#39;s derived from MCK.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130647?ContentTypeID=1</link><pubDate>Wed, 02 May 2018 15:44:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d01490de-87a1-4275-9062-f9840b382ccb</guid><dc:creator>rpriddell</dc:creator><description>&lt;p&gt;Thanks for the response. How about the restriction on 48 kHz for the frame clock? Is it also a duty cycle issue?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130512?ContentTypeID=1</link><pubDate>Wed, 02 May 2018 11:34:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0f4d3e83-1f8d-4746-9b92-4649d0505c32</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;-Edit&lt;br /&gt;&lt;br /&gt;The duty cycle goes out of I2S spec&amp;nbsp;(45-55%) above 4MHz, to 60-70%.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130328?ContentTypeID=1</link><pubDate>Mon, 30 Apr 2018 15:46:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:15ce2730-f99c-46e8-93b0-56c3ac8eb3ed</guid><dc:creator>rpriddell</dc:creator><description>&lt;p&gt;What drives this though? The configuration examples and register settings indicate you can use a divisor smaller than 8. Empirically I can set it up with a divisor producing an MCLK of 8 MHz and I see no issues on the clock edges. Is this a true limitation, or is there lack of production testing to verify it will work?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130184?ContentTypeID=1</link><pubDate>Sat, 28 Apr 2018 15:47:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6fc842ea-a8db-4b04-b246-88840c9cb1fb</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;4MHz is the&amp;nbsp;specified limit, even when operating in slave mode.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130183?ContentTypeID=1</link><pubDate>Sat, 28 Apr 2018 15:37:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ac6aa8d5-6d4b-4101-bc33-4db1b02abbd7</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;Hey massimo,&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;4MHz is the limit for MCK. The MCK is derived from the 32MHz clock and a divisor. In the SDK example the default config is 32MHz /8 = 4MHz.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Cheers,&lt;br /&gt;Håkon H.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/130167?ContentTypeID=1</link><pubDate>Fri, 27 Apr 2018 20:14:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8c5967c8-c08e-455e-a617-ad76c5acf272</guid><dc:creator>rpriddell</dc:creator><description>&lt;p&gt;One further datapoint to add... I would only be interested in the nordic master receiving data over I2S and do not need the transmit path to work. So if there is some restriction on Master TX, i needn&amp;#39;t be concerned.&lt;/p&gt;
&lt;p&gt;Nordic as Master, I2S Format, Mono, Nordic Rx only (no transmit needed), 62.5 kHz frame clock with 8 MHz master clock desired, 16 bit width.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52840 Maximum I2S Settings</title><link>https://devzone.nordicsemi.com/thread/129877?ContentTypeID=1</link><pubDate>Thu, 26 Apr 2018 07:55:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4391354b-c015-412a-989d-fe7f233726af</guid><dc:creator>rpriddell</dc:creator><description>&lt;p&gt;I should also note that my application would be I2s format mono, not stereo.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>