<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/3549/problem-with-nrf51822-in-spi-slave-mode</link><description>Hello all 
 I making some device with ARM core CPU with nRF51822. 
 I set CPU to SPI master and set nRF51822 to slave.
And then I read some data from nRF51822, that was always &amp;quot;0x55&amp;quot; or &amp;quot;0xAA&amp;quot;.
That depend on configuration of POL and PHA in master</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 27 Aug 2014 12:06:54 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/3549/problem-with-nrf51822-in-spi-slave-mode" /><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12860?ContentTypeID=1</link><pubDate>Wed, 27 Aug 2014 12:06:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4ebc3f9d-f164-4f51-9ad6-8a9db5823ef5</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;My question is also, what data is in the m_tx_buf buffer. When spi_slave_event_handle is entered, the SPI transaction is finished and you have already sent the data in the m_tx_buf buffer to the SPI master. Your loopback function writes the data into the m_tx_buf buffer but that will only be sent to the master next time the SPI master clocks out a byte. So my guess is that if you clock out another byte, then you might get 0x33 back to the SPI master.    Also, is the RX_BUF_SIZE == 1? If not, code execution will not exceed the error check APP_ERROR_CHECK_BOOL.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12857?ContentTypeID=1</link><pubDate>Wed, 27 Aug 2014 11:57:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:59e837ea-c37a-4b38-91aa-68af60f62993</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;Ok, if you know that SPI slave mode is MODE_0, then SPI master mode should also be MODE_0. For the value 0xAA that you read when the master mode is MODE_1, MODE_2 or MODE_3, it is the DEF character and is clocked out on MISO most likely because the SPI slave has stalled.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12856?ContentTypeID=1</link><pubDate>Tue, 26 Aug 2014 09:16:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:81785c0b-83b1-4078-9080-9428df239b01</guid><dc:creator>Sean</dc:creator><description>&lt;p&gt;SPI slave(nRF51) using SPI_MODE_0(fixed. I can&amp;#39;t change this side), and I try MODE_0~MODE_3 in master side.
And I provide the delay between spi_cs_enable and spi_write, also between spi_cs_enable and spi_read, also.&lt;/p&gt;
&lt;p&gt;Master MODE_0: Write 0x33, Read: 0x55
Master MODE_1: Write 0x33, Read: 0xAA
Master MODE_2: Write 0x33, Read: 0xAA
Master MODE_3: Write 0x33, Read: 0xAA
(Write means master to slave, Read means slave to master)&lt;/p&gt;
&lt;p&gt;I guess give waveform on the bus lines to you in tomorrow.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12859?ContentTypeID=1</link><pubDate>Tue, 26 Aug 2014 08:40:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9029b4ee-0301-41c8-afd0-c7964eeb3249</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;You need to provide the delay between spi_cs_enable and spi_write, also between spi_cs_enable and spi_read&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12855?ContentTypeID=1</link><pubDate>Fri, 22 Aug 2014 11:36:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b9e6af9a-b7aa-4964-a4d5-95959ccf9c28</guid><dc:creator>Sean</dc:creator><description>&lt;p&gt;Thank you for share document :-)
I updated some code in below.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12858?ContentTypeID=1</link><pubDate>Fri, 22 Aug 2014 11:26:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:56421a09-258f-4afc-9552-4ddc666bffd6</guid><dc:creator>Sean</dc:creator><description>&lt;p&gt;Dear Stefan Birnir Sverrisson&lt;/p&gt;
&lt;p&gt;I set 1 ms delay before and after CSN HIGH.&lt;/p&gt;
&lt;p&gt;Here is my using code in master and slave.&lt;/p&gt;
&lt;p&gt;Could you find something wrong in this?&lt;/p&gt;
&lt;p&gt;For Master (just pseudocode)&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;spi_test()
{
spi_init();
spi_cs_enable(); // LOW
spi_write( 0x33, 1 );
delay( 1ms );
spi_cs_disable(); // HIGH
delay( 1ms );

spi_cs_enable();
read = spi_read( 1 );
delay( 1ms );
spi_cs_disable();
delay(1ms);
}
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;For slave&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;static void spi_slave_event_handle(spi_slave_evt_t event)
{
uint32_t err_code;

if (event.evt_type == SPI_SLAVE_XFER_DONE)
{ 
    led_toggle();
    
    //Check if buffer size is the same as amount of received data.
    APP_ERROR_CHECK_BOOL(event.rx_amount == RX_BUF_SIZE);

    // loop back
    for( i=0 ; i&amp;lt;event.rx_amount ; i++ )
    {
      m_tx_buf[i] = m_rx_buf[i];
    }

    //Set buffers.
    err_code = spi_slave_buffers_set(m_tx_buf, m_rx_buf, sizeof(m_tx_buf), sizeof(m_rx_buf));
    APP_ERROR_CHECK(err_code);          
}
}
&lt;/code&gt;&lt;/pre&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12854?ContentTypeID=1</link><pubDate>Fri, 22 Aug 2014 10:58:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ffcd9127-4cb4-4e77-b6b1-f966ca907a83</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;To get the nRF51 Series reference manual, the easiest way is to create a profile on www.nordicsemi.com and then download it directly from our web site at       &lt;a href="https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF51-RM/20337"&gt;www.nordicsemi.com/.../20337&lt;/a&gt;       You can also get the nRF51822 PS on this path      &lt;a href="https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF51822-PS/20339"&gt;www.nordicsemi.com/.../20339&lt;/a&gt;       However, you apply the 7.1us delay on the SPI master device, set the CSN high, wait for minimum 7.1us and then start clock out data. Is that possible on your SPI master device?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12853?ContentTypeID=1</link><pubDate>Fri, 22 Aug 2014 09:25:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:96003c64-aff6-4d5f-9ee2-0ea2d7b3cb3a</guid><dc:creator>Sean</dc:creator><description>&lt;p&gt;Thank you for replying.&lt;/p&gt;
&lt;p&gt;I provided nRF51 module include that&amp;#39;s SW from other company.
I just communication with nRF51 using SPI.
So, I don&amp;#39;t have nRF51 SDK and documents.&lt;/p&gt;
&lt;p&gt;Could you give me nRF51 reference manaul?
At least, could you explain which case read back 0x55 and 0xAA?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Problem with nrf51822 in spi slave mode</title><link>https://devzone.nordicsemi.com/thread/12852?ContentTypeID=1</link><pubDate>Thu, 21 Aug 2014 09:49:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:41d4b375-9975-4ade-92d1-d2a6e4ea257d</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;Hi Sean&lt;/p&gt;
&lt;p&gt;I assume you are using the spi_slave_example from nRF51 SDK v6.0.0?&lt;/p&gt;
&lt;p&gt;The character 0x55 is the ORC character (SPI over-read character).
The character 0xAA is the DEF character (SPI default character)
You can read about what those characters stand for in the SPIS section in the nRF51 Series Reference manual. I do not realize however why they are clocked out on MISO in this case.&lt;/p&gt;
&lt;p&gt;The most common problem however when interfacing the nRF51 SPIS is that there needs to be a 7.1us delay from when you set CSN high until you start clocking out data, see nRF51822 PS v2.0, table 39.&lt;/p&gt;
&lt;p&gt;Make sure your POL and PHA settings are identical on SPI master and SPI slave side. To configure that on the nrf51 slave, you need to write to the SPIS-&amp;gt;CONFIG register. To do that in the spi_slave_example from nRF51 SDK v6.0.0, you select the SPI mode. By default, the example sets the SPIS to mode 0 (see the spi_slave_example_init function), which contains the configuration (CPOL = 0, CPHA = 0). The total mapping is:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;SPI_MODE_0,                             /**&amp;lt; (CPOL = 0, CPHA = 0). */
SPI_MODE_1,                             /**&amp;lt; (CPOL = 0, CPHA = 1). */
SPI_MODE_2,                             /**&amp;lt; (CPOL = 1, CPHA = 0). */
SPI_MODE_3                              /**&amp;lt; (CPOL = 1, CPHA = 1). */
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;as defined in spi.slave.h. So, select the mode that reflects the POL and PHA settings of the SPI master device.&lt;/p&gt;
&lt;p&gt;If the above does not help, it would be helpful to see all the signals on the SPI bus, i.e. the CSN, SCK, MOSI and MISO&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>