https://devzone.nordicsemi.com/f/nordic-q-a/3605/spi-config-registerHello ! When i was trying to configur my SPI, I observed that there is a difference between the position field announced in the nrf51 reference manual v2.1 and the nRF51_bitfields : nRF51_bitfields says : /* Register: SPI_CONFIG / / Descriptionen-USTelligent Community 13Wed, 27 Aug 2014 13:34:09 GMThttps://devzone.nordicsemi.com/thread/13073?ContentTypeID=1Wed, 27 Aug 2014 13:34:09 GMT137ad170-7792-4731-bb38-c0d22fbe4515:f0443231-b4ee-4e61-9a67-ec79514e8463Stefan Birnir Sverrisson<p>Sorry for the confusion. Clearly I was looking at the CONFIG register for the SPI slave, where the definition for the CPHA and CPOL bits is correct. So the conclusion is that the nRF51 Series reference manual v2.1, section 25.2.7, which describes the CONFIG register of the SPI master, is incorrect. In section 25.2.7, the CPOL bit should be bit C and CPHA should be bit B.</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/13072?ContentTypeID=1Tue, 26 Aug 2014 20:13:12 GMT137ad170-7792-4731-bb38-c0d22fbe4515:9192150c-0825-4e5d-ac3c-e0b091c36a8cSaad<p>Yes I&#39;m. just take a look at the nRF51_bitfields.h and compare the positions annonced there and the other one annonced at the nRF51 Series Reference Manual v2.1 and you&#39;ll see what I&#39;m talking about !</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/13071?ContentTypeID=1Tue, 26 Aug 2014 09:03:24 GMT137ad170-7792-4731-bb38-c0d22fbe4515:c2aa429a-6f5a-4698-8e37-83e0ed6445b6Stefan Birnir Sverrisson<p>Hi</p> <p>I observe that the SDK and the nRF51 Series Reference Manual v2.1 are in sync. I look in the nRF51 Series Reference Manual v2.1, section 26.5.11 and it says:</p> <p>B CPHA Serial clock (SCK) phase. C CPOL Serial clock (SCK) polarity.</p> <p>Are you sure you are looking at v2.1?</p><div style="clear:both;"></div>