SPI double buffering on TX

RE: SPI double buffering on TX

Nenik — Fri, 10 Aug 2018 04:55:26 GMT

So this is the best code I could get working reliably:

      if (first) {
        // blindly fill the double buffered output
        NRF_SPI0->TXD = col >> 8;
        NRF_SPI0->TXD = (uint8_t)col;
        first = false;
      }  else {
        while(!NRF_SPI0->EVENTS_READY);
        NRF_SPI0->EVENTS_READY = 0;
        (void)NRF_SPI0->RXD;

        NRF_SPI0->TXD = col >> 8;

        while(!NRF_SPI0->EVENTS_READY);
        NRF_SPI0->EVENTS_READY = 0;
        (void)NRF_SPI0->RXD;
        NRF_SPI0->TXD = (uint8_t)col;        
      }

I.e. I have to both reset the READY flag and read the RDX register. And do so in that particular order, including the TXD write. It still improves the throughput from 5.7Mbps to about 7Mbps.

Interestingly enough, my application still works if I comment out the second EVENTS_READY clearing, which improves the performance further, up to 7.5-7.7Mbps, though I am not comfortable going there w/o understanding why that still works.

I might investigate the EasyDMA approach later, in case it has low-enough overhead when used for back-to-back 2B-only transactions, though I am fine with 7Mbps already.

RE: SPI double buffering on TX

Edvin — Wed, 01 Aug 2018 06:51:32 GMT

Sorry. I forgot that. Yes, you do have to clear the ready event.

Reading from the text after the figure:
"...Therefore, it is important that you always clear the READY event, even if the RXD register and the data that is being received is not used."

Best regards,

Edvin

RE: SPI double buffering on TX

Nenik — Wed, 01 Aug 2018 04:52:00 GMT

Ah, so I always need to be one byte ahead? I'll try that, though I'd expect to be able to let the pipeline drain. Also, don't I need to clear the READY flag between the bytes?

RE: SPI double buffering on TX

Edvin — Tue, 31 Jul 2018 13:29:58 GMT

Hello,

The chapter that you linked to (here), if you look at the diagram beneath the text bolk, you can see the events that appear. As you see you will get a READY event for each byte. This means that you can queue one byte on each READY event. If you need to queue two at the time, you must wait for two.

Something like this:

produce();
TXD = data >> 8;
TXD = (uint8_t)data;

while(true)
{
    produce();
    while(!READY){};
    TXD = data >> 8;
    while(!READY){};
    TXD = (uint8_t)data;
}

RE: SPI double buffering on TX

Nenik — Wed, 25 Jul 2018 07:26:21 GMT

No, but I am not using interrupts either. Do I need to enable the interrupts to get EVENTS_READY properly delivered?

I doubt, since the sequence of sendByte(); waitForReady(); sendByte(); waitForReady(); (as descrubed in my first code snippet in OP) works reliably and EVENTS_READY is delivered just fine each time.

The only thing that doesn't work for me is to use the double-buffering, sending two bytes in a row (as suggested by PS, section 48.1.3), and only then checking for finished transaction...

RE: SPI double buffering on TX

Edvin — Tue, 17 Jul 2018 15:14:59 GMT

Hello,

Have you set the SPI's INTENSET register to enable the EVENTS_READY event properly? Please see this page on infocenter.

Best regards,

Edvin