RE: Questions regarding interrupts level in nRF52840 chip

Håkon Alseth — Thu, 26 Jul 2018 12:27:42 GMT

Hi,

[quote user=""]1 - The number of bits used to define priority in the chip are set to 3 (__NVIC_PRIO_BITS), this means that an interrupt can have a priority from 0 to 7! assuming sub-priority is not using since I couldn't fin any information about it in the datasheet, is that correct ?[/quote]

This corresponds to the NVIC interrupt priorities available in the hardware core of the Cortex M4 CPU, which are from 0 (highest priority) to 7 (lowest priority). Information related to the CPU core can be found on ARMs infocenter: http://infocenter.arm.com/help/topic/com.arm.doc.100166_0001_00_en/index.html

[quote user=""]2- I read in the forum that the mesh application thread can be set to NRF_MESH_IRQ_PRIORITY_LOWEST(7) or NRF_MESH_IRQ_PRIORITY_THREAD(15). What's the relation between these values and the hardware interrupt priorities in the first question ?[/quote]

The difference between the two is that NRF_MES_IRQ_PRIORITY_LOWEST is running in interrupt context, with priority level 7. This means that it will interrupt a function running in main-context (ie: your main while loop), but not any other interrupt priorities (from 6 to 0).

NRF_MESH_IRQ_PRIORITY_THREAD is the same as running a function in your main-loop (thread and main is the same).

Kind regards,

Håkon

RE: Questions regarding interrupts level in nRF52840 chip

Chaabane — Wed, 25 Jul 2018 13:41:36 GMT

Hi,

Any feedback on my request ?

Thx