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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/36750/need-three-spi-master-interfaces</link><description>I am trying to use the sdk_config.h file from SDK15 to setup a custom board with a nRF52832. The nRF5283 connects to three SPI peripherals. For ease of software development the three SPI peripherals are all in slave mode, the nRF52 is master of all of</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 24 Jul 2018 13:32:57 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/36750/need-three-spi-master-interfaces" /><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141161?ContentTypeID=1</link><pubDate>Tue, 24 Jul 2018 13:32:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ec74b11b-47ee-4b1c-8afa-12f0d63abc47</guid><dc:creator>Steven Grunza</dc:creator><description>&lt;p&gt;Using a single SPI controller will prevent the DMA from moving data from the two slaves simultaneously.&amp;nbsp; My hope is that while the nRF52832 CPU is busy handling BLE protocol the DMA will be moving data from the two slaves with the DMA&amp;#39;s arbitrating between themselves to get to the data RAM.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Since the board has already been designed and built, it now needs to be three separate SPI controllers.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141159?ContentTypeID=1</link><pubDate>Tue, 24 Jul 2018 13:25:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:798779fd-eaba-4ad0-a939-dcf52775055b</guid><dc:creator>Martin Lesund</dc:creator><description>&lt;p&gt;Hi Steven,&lt;/p&gt;
&lt;p&gt;You can have one master and several slave. Just have to use the SS (Slave Select) pins to control which one should be active. (see figure)&lt;/p&gt;
&lt;p&gt;You can use any GPIO pin as MOSI, MISO etc.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/support-attachments/beef5d1b77644c448dabff31668f3a47-4ba8eabb89e545eda924a21dd6851a72/pastedimage1532438119078v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;a href="http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.sdk5.v15.0.0%2Fhardware_driver_spi_master.html&amp;amp;cp=4_0_0_2_0_13" target="_blank" rel="noopener noreferrer"&gt;SPI Master documentation&lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&amp;gt;&lt;/strong&gt; Use the &lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.sdk5.v15.0.0/spi_master_example.html"&gt;SPI Master Example&lt;/a&gt;&amp;nbsp;as reference.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141054?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 22:43:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3181457a-91f3-489e-8abe-f0721be6900c</guid><dc:creator>mtsunstrum</dc:creator><description>&lt;p&gt;OK, so you will have to have some extra code to manage&amp;nbsp;the TWI and SPI that are using the same peripheral ID.&lt;/p&gt;
&lt;p&gt;Depending on your use case, that may be a no-brainer, or there could be some run-time challenges.&lt;/p&gt;
&lt;p&gt;Otherwise ... good to go.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141052?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 21:56:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:92120ce6-7916-46be-b2be-5530b04198c2</guid><dc:creator>Steven Grunza</dc:creator><description>&lt;p&gt;The board was designed with four pins dedicated to each SPI slave device.&amp;nbsp; There are now TWI/I2C devices on the board.&amp;nbsp; The main purpose of this board is to move data between the SPI ports and a device at the other end of the BLE link.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141050?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 21:47:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2281b0e7-bcfa-403f-bfbc-2e1cd8e2de2a</guid><dc:creator>mtsunstrum</dc:creator><description>&lt;p&gt;Yes, that is correct, but important to know the limitations of that approach.&lt;/p&gt;
&lt;p&gt;&lt;span&gt;= ===================================================&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;From nRF52 User Manual ...&lt;/p&gt;
&lt;p&gt;15.2 Peripherals with shared ID&lt;br /&gt;In general, and with the exception of ID 0, peripherals sharing an ID and base address may not be used&lt;br /&gt;simultaneously. The user can only enable one at the time on this specific ID.&lt;/p&gt;
&lt;p&gt;&lt;span&gt;= ===================================================&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;ID 3 and 4 are common IDs between TWI&amp;nbsp;and SPIM, so if your system is also using TWI, you may not be able to use all 3 the SPIM instances.&lt;/p&gt;
&lt;p&gt;= ===================================================&lt;/p&gt;
&lt;p&gt;In addition, each of your individual SPIM instances will (most likely) need to use unique pins for SPIM CLK, MISO, MOSI, SS-&amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/p&gt;
&lt;p&gt;It is my understanding that each SPIM instance software driver cannot share pins.&amp;nbsp; ... But I could be wrong here ... just haven&amp;#39;t tried that.&lt;/p&gt;
&lt;p&gt;So with this approach, for 3 SPI slave devices, you may occupy up to 12 GPIO pins ... which may not be desirable, depending on the number of GPIOs available.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141044?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 20:42:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b31eac1d-7434-4a1a-9481-2f6da4093803</guid><dc:creator>Steven Grunza</dc:creator><description>&lt;p&gt;Why would I need to reconfigure the SPIM for each different device.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Aren&amp;#39;t there three SPI controllers in the nRF52832: SPIM0 (ID 3), SPIM1 (ID 4), and SPIM2 (ID 35)?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Need three SPI master interfaces</title><link>https://devzone.nordicsemi.com/thread/141041?ContentTypeID=1</link><pubDate>Mon, 23 Jul 2018 19:50:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e7d3a09d-515c-47b7-bcf3-b82c67e5f151</guid><dc:creator>mtsunstrum</dc:creator><description>&lt;p&gt;You cannot configure this within sdk_config.h&lt;/p&gt;
&lt;p&gt;Your best option is to configure at run-time, and reconfigure the SPIM at each time that you want to communicate with a selected SPI slave device&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;nrfx_spim_config_t spim_config = NRFX_SPIM_DEFAULT_CONFIG;
// Above sets default SPIM (SPI Master) configuration settings, with NO SPI pin assignments
spim_config.ss_pin = your slave select pin (1 of your 3 choices);
spim_config.miso_pin = your miso pin;
spim_config.mosi_pin = your mosi pin;
spim_config.sck_pin = your spi clock pin;
spim_config.ss_active_high = false;

// Initializes and enables spim ...
err_code = nrfx_spim_init(&amp;amp;spim, &amp;amp;spim_config, spim_evt_handler, NULL);

//... now proceed to do your SPI Master transfer to your selected SPI slave device
// You would have to do a nrfx_spim_uninit() when you change SPI slave devices&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Also note, if each SPI slave supports different clock rates, data phases, etc ... then you would config differently at above configuration stage.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>