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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI Read issue</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/37145/spi-read-issue</link><description>Hi, 
 I am using nRF52832 microcontroller in project. 
 I use SPI interface for serial EEPROM. 
 I could able to see write packets are getting transmitted and verified the signals by probing. SS, SCK and MOSI are perfect. 
 
 But when i initiate the Read</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 06 Aug 2018 13:10:09 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/37145/spi-read-issue" /><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/143038?ContentTypeID=1</link><pubDate>Mon, 06 Aug 2018 13:10:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e5b9b5a4-6f8b-4c55-98bd-32174c88639c</guid><dc:creator>Chinna</dc:creator><description>&lt;p&gt;Attached the MOSI and MISO signal CRO captures. I could see the write and read data on the SPI lines. But MISO data is not reflecting on the receive buffer.&lt;/p&gt;
&lt;p&gt;Image1&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/Data-_2D00_-0x50.jpg" /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Image2&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/Data-_2D00_-0x55.jpg" /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;The Yellow line in the above picture is MOSI and Green is MISO.&lt;/p&gt;
&lt;p&gt;Its is a combination of Read(Read Command + Start Address) and Write sequence (Write Enable, Write Command + Start Address, Data)&lt;/p&gt;
&lt;p&gt;Image 1 Data is 0x50&lt;/p&gt;
&lt;p&gt;Image 2 Data is 0x55&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Yellow line (MOSI) Read Command is sent followed by read address ( 24 bit address - 0x00,0x00,0x00). And response for the received command is in green (MISO) line 0x50(image1) and 0x55(image2). Reading 4 bytes of data from starting location 0x00.&lt;/p&gt;
&lt;p&gt;Yellow line (MOSI), Write Enable, Wrtie Command is sent followed by read address ( 24 bit address - 0x00,0x00,0x00) and four byutes of data (0x50 - (Image1), 0x55 (image2), Write status command. Response for the received command is in green (MISO) status byte .&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Conclusion: Analysing both images, Even if write different data in the location (0x00) during the read sequnce i could see the same data (Data written in wrtie sequence) in the MISO lines but same data i am not able to capture in the receive buffer for the further processing.&lt;/p&gt;
&lt;p&gt;Knidly share your thoughts in the same.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; Regards,&lt;/p&gt;
&lt;p&gt;Chinnasamy.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/143030?ContentTypeID=1</link><pubDate>Mon, 06 Aug 2018 12:56:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3a610214-682d-4c7b-ae70-bf727bd9b33d</guid><dc:creator>Chinna</dc:creator><description>&lt;p&gt;Yes. Added this macro helped me to get P0.09 and P0.10 to configure as GPIO. Now SPI configuration is working fine. But i am not able to read (MISO) data on the receive buffer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/142843?ContentTypeID=1</link><pubDate>Fri, 03 Aug 2018 13:28:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aef6fb2d-15a6-4d7b-bdfa-e7aa438f96ad</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Have you added&amp;nbsp;CONFIG_NFCT_PINS_AS_GPIOS to the Preprocessor Definitions?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/142833?ContentTypeID=1</link><pubDate>Fri, 03 Aug 2018 12:55:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dc7e892c-cf7f-4491-8767-2ec6816efc90</guid><dc:creator>Chinna</dc:creator><description>&lt;p&gt;Hi Kevin,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Yes. I have tried CS LOW during transmission. But it did not worked.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;We are very much close to the problem, Pin 9, 10 are by default NFC pin. But since we connected for CS(P0.10) and MISO(P0.09) purpose for the serial EEPROM interface, we are not able to get the purpose solved because of the NFC default configuration.&lt;/p&gt;
&lt;p&gt;But some of the forum says, enable macro&amp;nbsp; &amp;quot;CONFIG_NFCT_PINS_AS_GPIOS&amp;quot; to configure NFC pins as GPIO pins. Even after enabling the macro same state. we defined &amp;quot;CONFIG_NFCT_PINS_AS_GPIOS&amp;quot; in sdk_config.h.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Kindly share you suggestion on the same.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; Regards,&lt;/p&gt;
&lt;p&gt;Chinnasamy.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/142795?ContentTypeID=1</link><pubDate>Fri, 03 Aug 2018 11:38:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d2a8e058-336a-4b61-8d08-6948b350deea</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Please post the code snippet where you initialize the SPI driver and send the read instruction. It would also be helpful if you could post a logic trace of the SPI lines when you send the read instruction.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/142781?ContentTypeID=1</link><pubDate>Fri, 03 Aug 2018 11:02:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a834b7c3-8d18-4f6a-9b16-564232ff2dcd</guid><dc:creator>KevinL</dc:creator><description>&lt;p&gt;You say the chip select is always high, but the chip select of SPI is active low. The &lt;a href="https://www.st.com/resource/en/datasheet/m95m02-dr.pdf"&gt;datasheet &lt;/a&gt;says so at page 9 under Chip select.&lt;/p&gt;
&lt;p&gt;Have you tried having the chip select low during transmission?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Read issue</title><link>https://devzone.nordicsemi.com/thread/142778?ContentTypeID=1</link><pubDate>Fri, 03 Aug 2018 10:52:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d776c166-3678-47c2-8f96-f344cf5b84dd</guid><dc:creator>Chinna</dc:creator><description>&lt;p&gt;For more information:&lt;/p&gt;
&lt;p&gt;I am using SDK 12.3.0, Softdevice 132.&lt;/p&gt;
&lt;p&gt;I am refering following link for SPI initialization:&lt;/p&gt;
&lt;p&gt;&lt;a href="http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.sdk52.v0.9.1%2Fhardware_driver_spi_master.html&amp;amp;cp=4_0_0_2_7"&gt;http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.sdk52.v0.9.1%2Fhardware_driver_spi_master.html&amp;amp;cp=4_0_0_2_7&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;The Chip select remains always high.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>