When to TX and when to RX

RE: When to TX and when to RX

Denna — Tue, 08 Feb 2022 16:10:40 GMT

Thank you very much Vidar!

RE: When to TX and when to RX

Vidar Berg — Tue, 08 Feb 2022 13:21:36 GMT

Hi Starbuck,

Attached below are the Altium files for the PCA10084 design. Let me know if you need these exported to Gerber or similar. Also, this is a fairly old design, and I'm not sure if we have performed any regulatory testing with it. Once you have finalized the design, you can create a new private support ticket if you want us to review it.

devzone.nordicsemi.com/.../pca10084.zip

Best regards,

Vidar

RE: When to TX and when to RX

Denna — Mon, 07 Feb 2022 19:04:26 GMT

Hi Jay,

We are in the same boat as Cai. I.E. we are also developing a custom board that includes an nRF52840 with SKY66112. Can you send me the PCA10084 design files so that we can copy the RF layout?

Thanks,

Starbuck

RE: When to TX and when to RX

phantomgz — Wed, 26 Jun 2019 07:02:13 GMT

Hi Jay.

I developing a custom board of nrf52840 with SKY66112, could you send me the pca10084 design file, I can copy the RF layout exactly same with pca10084.

Regards,

Cai.

RE: When to TX and when to RX

Vidar Berg — Wed, 08 Aug 2018 12:15:33 GMT

Hi,

Please try the configuration below, it should work, but haven't tested with an actual FEM.

#include "nrf_drv_ppi.h"
#include "nrf_drv_gpiote.h"


#define  CTX_PIN             //
#define  CRX_PIN             //

#define  FEM_CPS             //
#define  FEM_CHL             // 
#define  FEM_CSD             //


// Initialize after ble_stack_init()
void fem_init(void)
{
   
    ret_code_t                      err_code;
    ble_opt_t                       opt;
    uint32_t                        gpiote_ch;
    nrf_ppi_channel_t               ppi_set_ch;
    nrf_ppi_channel_t               ppi_clr_ch; 
    nrf_drv_gpiote_out_config_t     config = GPIOTE_CONFIG_OUT_TASK_TOGGLE(false);
    
    /*Configure static pins*/
    nrf_gpio_pin_clear(FEM_CPS);
    nrf_gpio_cfg_output(FEM_CPS);
    
    nrf_gpio_pin_set(FEM_CHL);
    nrf_gpio_cfg_output(FEM_CHL);
    
    nrf_gpio_pin_set(FEM_CPS);
    nrf_gpio_cfg_output(FEM_CPS);


    /* Optional: use PPI and GPIOTE drivers to reserve channels for PA/LNA control. Not neccessary if application makes sure to not use same channels for other tasks*/
    err_code = nrf_drv_gpiote_init();
    if(err_code != NRF_ERROR_INVALID_STATE)
    {
        APP_ERROR_CHECK(err_code);
    }
    
    err_code = nrf_drv_ppi_init();
    if(err_code != NRF_ERROR_INVALID_STATE)
    {
        APP_ERROR_CHECK(err_code);
    }
    
    err_code = nrf_drv_ppi_channel_alloc(&ppi_set_ch);
    APP_ERROR_CHECK(err_code);
    
    err_code = nrf_drv_ppi_channel_alloc(&ppi_clr_ch);
    APP_ERROR_CHECK(err_code);
    
    err_code = nrf_drv_gpiote_out_init(CRX_PIN, &config);
    APP_ERROR_CHECK(err_code);
            
    gpiote_ch = nrf_drv_gpiote_out_task_addr_get(CRX_PIN); 
    
    //common PA/LNA config
    memset(&opt, 0, sizeof(ble_opt_t));
    opt.common_opt.pa_lna.gpiote_ch_id  = (gpiote_ch - NRF_GPIOTE_BASE) >> 2;   // GPIOTE channel used for radio pin toggling
    opt.common_opt.pa_lna.ppi_ch_id_clr = ppi_clr_ch;                           // PPI channel used for radio pin clearing
    opt.common_opt.pa_lna.ppi_ch_id_set = ppi_set_ch;                           // PPI channel used for radio pin setting
    
    // CTX pin control (PA config)

    opt.common_opt.pa_lna.pa_cfg.active_high = 1;                    // Set the pin to be active high
    opt.common_opt.pa_lna.pa_cfg.enable      = 1;                    // Enable toggling
    opt.common_opt.pa_lna.pa_cfg.gpio_pin    = CTX_PIN;              // The GPIO pin to toggle
    
    // CRX pin control (LNA config)
    
    opt.common_opt.pa_lna.lna_cfg.active_high  = 1;                      // Set the pin to be active high
    opt.common_opt.pa_lna.lna_cfg.enable       = 1;                      // Enable toggling
    opt.common_opt.pa_lna.lna_cfg.gpio_pin     = CRX_PIN;                // The GPIO pin to toggle    

    err_code = sd_ble_opt_set(BLE_COMMON_OPT_PA_LNA, &opt);
    APP_ERROR_CHECK(err_code);    
    
}

RE: When to TX and when to RX

Cy — Tue, 07 Aug 2018 23:48:27 GMT

Yes, the hardware aspect of the FEM is in place, thank you! I am in need of some firmware guidance. I did look over the suggestions that have been offered, thank you! The SD is not what I would call well documented, but I do see that my request is quit feasible and that it is already in place, but how do I implement it.

I scanned the SDK14.0 for LNA/PA pins and see that there is a structure within the ble.h file and has a typedef struct ble_pa_lna_cfg_t and that it can be configured for active high and low if defined it is enabled and that the gpio pin to be used is 6.

I have both a CRX and CTX which would require two separate pins. I did not look through the examples to find any that utilize a FEM, but Jay seems to say there is none.

I will continue to dig through the documents to find more clues!

RE: When to TX and when to RX

Jay Tyzzer — Tue, 07 Aug 2018 21:24:40 GMT

devzone.nordicsemi.com/.../pca10084_5F00_schematic_5F00_and_5F00_pcb.pdf

Please look at the S140 Softdevice specification. Page 54, section 11.6 Power Amplifier and Low Noise Amplifier control

configuration (PA/LNA) You can also look in the Soft device reference manual.

Soft devcie S140 does support it. I cannot see any example in the SDK to exercise the control lines.

I have attached a hardware design that was a project between Nordic and Skyworks on a SKY66112 FEM and the nRF52840.

If you have any further questions please let us know.

Regards,

Jay Tyzzer

RE: When to TX and when to RX

AmbystomaLabs — Tue, 07 Aug 2018 20:48:10 GMT

You just use pa lna assist in the SD. It is well documented in the SD reference manual.

http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.s132.sds/dita/softdevices/s130/radio_notif/radio_notif_palna.html?cp=2_3_1_0_10_5