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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NRF24L01+ RX Mode and Flush Problem - STM32F (SOLVED)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/37610/nrf24l01-rx-mode-and-flush-problem---stm32f-solved</link><description>Edit : I solved the problem. The problem was related to variable declaritions and pointer. None of the commands was not working except Write Register and Read Register. I had declared commands in the form of #define COMD_XX_XX (uint8_t) 0x00 in header</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Sat, 08 Sep 2018 19:57:01 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/37610/nrf24l01-rx-mode-and-flush-problem---stm32f-solved" /><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F (SOLVED)</title><link>https://devzone.nordicsemi.com/thread/147889?ContentTypeID=1</link><pubDate>Sat, 08 Sep 2018 19:57:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:64bb8c27-54c7-4d04-976c-994650c3e4ab</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;Hi Kenneth. I solved the problem and wanted to let you know. You can check the edit.&lt;br /&gt;Best regards.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/146425?ContentTypeID=1</link><pubDate>Thu, 30 Aug 2018 07:53:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:16911873-45f9-4df0-ac22-250921398bfb</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Seems you have identified the root cause, since the FLUSH_TX should be 0xE1 and&amp;nbsp;R_RX_PAYLOAD should be 0x61 on MOSI. The MISO will always output the STATUS register while command is received on MOSI.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/146379?ContentTypeID=1</link><pubDate>Wed, 29 Aug 2018 20:18:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c83ca023-d35c-4b9f-812c-ae770fbb0e03</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;I have just used a logic analyzer and seen what&amp;#39;s going on the MOSI and MISO pin.&lt;br /&gt;For read and write register commands, there is no problem.&lt;br /&gt;But, when I send R_RX_Payload command STM sends 0x1. It must have sent 0x61 according to the datasheet. &lt;br /&gt;When I send Flush_TX command, STM sends just 0x00. &lt;br /&gt;I see that the content of status register comes from the MISO pin, that is what datasheet verifies, in both commands.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145382?ContentTypeID=1</link><pubDate>Wed, 22 Aug 2018 20:20:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0c52c9d0-30d5-4994-8ff0-2ca179e331e8</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;Sir, do you think using pull-up or pull-down resistors works ? If so, could you please explain how.&lt;br /&gt;Thanks&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145379?ContentTypeID=1</link><pubDate>Wed, 22 Aug 2018 18:49:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:bb1a62c8-3408-4861-b511-bc9184bde774</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;Hi Kennth,&amp;nbsp;&lt;br /&gt;&lt;br /&gt;Since I do not have a logic analyzer and also do not have access to an oscilloscope for now, I used my Arduino&amp;nbsp;Uno to see what flows on the MOSI pin.&lt;br /&gt;&lt;br /&gt;I continuously sent Flush_RX command through SPI but could not see any changes. I just read 0.&lt;br /&gt;The interesting thing is before I run Flush_RX command, I do some configurations on registers and this process also uses the MOSI pin to send&amp;nbsp;command.&lt;br /&gt;&lt;br /&gt;But I can read and write to registers properly. ?&lt;br /&gt;&lt;br /&gt;This may be because of Arduino Uno is about x4 slower than STM32F103.&lt;br /&gt;&lt;br /&gt;By the way, let me give you my SPI configuration.&lt;br /&gt;&lt;br /&gt;Direction = 2 Lines&lt;br /&gt;Data Size = 8 bits&lt;br /&gt;Clock Polarity = LOW&lt;br /&gt;Clock Phase = 1 Edge&lt;br /&gt;First Bit = MSB&lt;br /&gt;&lt;br /&gt;Thank you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145297?ContentTypeID=1</link><pubDate>Wed, 22 Aug 2018 11:44:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c19b07c8-d510-4556-9ebd-49163a83f641</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;You should send 0xE2, but a logic analyzer trace is needed to confirm that is what is sent on the MOSI pin.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145083?ContentTypeID=1</link><pubDate>Tue, 21 Aug 2018 10:15:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:df1a3553-526c-4da5-839e-ad5bca63cc07</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;Thank you for your time Kenneth.&lt;br /&gt;&lt;br /&gt;I want to ask something.&amp;nbsp;Below the command list section in datasheet, it says &amp;quot;When accessing multi-byte registers read or write to the MSBit of LSByte first.&amp;quot;&lt;/p&gt;
&lt;p&gt;The word for FLUSH_RX is&amp;nbsp; 1110 0010 that is 0xE2. When I send this command through spi, should I send just 0xE2 or in reverse order (0x2E).&amp;nbsp;&lt;br /&gt;&lt;br /&gt;I am confused.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145080?ContentTypeID=1</link><pubDate>Tue, 21 Aug 2018 09:50:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a6d6eaa9-8ad6-4bdb-bee8-a241c7304579</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;When I send READ_RX_PAYLOAD command through SPI, what I read is the content of status register. So, I cannot see the value that has been sent. Then I made some changes on code.&amp;nbsp;&lt;br /&gt;I send&amp;nbsp;&lt;span&gt;READ_RX_PAYLOAD command through SPI and then send NOP command. This time I receive 0x00.&lt;br /&gt;&lt;br /&gt;I&amp;#39;ve just checked&amp;nbsp;R_RX_PL_WID command and there is the same situation.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145067?ContentTypeID=1</link><pubDate>Tue, 21 Aug 2018 09:14:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:46834789-6e43-4e81-98d4-a20ddfe466be</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I can only confirm that it doesn&amp;#39;t make sense, next step should be a logic analyzer trace.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145037?ContentTypeID=1</link><pubDate>Tue, 21 Aug 2018 07:34:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:11d79e82-25f5-4b71-a45e-39977f685462</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;For example, I have no problem with write and read register commandas. I can write to a register and read a registser properly.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/145028?ContentTypeID=1</link><pubDate>Tue, 21 Aug 2018 06:55:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:78e1ddda-7583-4bf9-9062-d77df6dae1f8</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I think there may be something wrong with the SPI configuration (e.g. wrong phase or polarity). When writing configuration, have you tried to read back configuration to verify it is set correctly?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/144974?ContentTypeID=1</link><pubDate>Mon, 20 Aug 2018 14:48:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aea6ac5a-3819-42a6-95b9-73e888757fa8</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;Hi,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Thanks for your reply. I will use a logic analyzer as soon as possible. What I really wonder is when I execute READ_RX_PAYLOAD command I just read the content of STATUS register but nothing else. Also, it seems that FLUSH RX command does not work. What could be problem?&lt;/p&gt;
&lt;p&gt;Thanks in advance.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/144971?ContentTypeID=1</link><pubDate>Mon, 20 Aug 2018 14:34:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5a88d233-3b61-4c81-aa96-9df065714ea3</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;If you haven&amp;#39;t already I recommend to check out nAN24-12, which show how to configure the nRF24L01 in different radio modes:&lt;br /&gt;&lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.appnotes/dita/appnotes/pdflinks/nan_24-12.html?cp=10_15"&gt;http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.appnotes/dita/appnotes/pdflinks/nan_24-12.html?cp=10_15&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Also, here you can find a minimum configuration required to send and receive:&lt;br /&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/13766/minimal-nrf24l01-setup-problem/52611#52611"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/13766/minimal-nrf24l01-setup-problem/52611#52611&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Still I think a logic analyzer trace would be useful to check all the 6 pins (irq, ce, and 4 spi lines).&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/144959?ContentTypeID=1</link><pubDate>Mon, 20 Aug 2018 13:25:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:22677806-9a84-4487-a24a-ec3e429ebee4</guid><dc:creator>PIC16F84A</dc:creator><description>&lt;p&gt;No I haven&amp;#39;t checked on a logic analyzer. But; I have just realized that R_RX_Payload command returns the value of STATUS register. So, what I read is the content of status register. I&amp;#39;ve made some changes on my code, after I execute R_RX_Payload command I receive the content of status register then I send this content through SPI and&amp;nbsp; get 0x00. So I can not read data that is sent from TX.&amp;nbsp;&lt;br /&gt;I think the problem is I do not know how to read a payload properly.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF24L01+ RX Mode and Flush Problem - STM32F</title><link>https://devzone.nordicsemi.com/thread/144905?ContentTypeID=1</link><pubDate>Mon, 20 Aug 2018 11:01:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:678b38e2-225d-40a9-8859-a8f97a3f3c6e</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Not sure what might be the problem here no. I assume you have checked on a logic analyzer trace to verify that the command is correct (e.g. SPI configuration, clock polarity and phase for spi command and data).&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>