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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NRF24L01+ STOP STATE</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/37741/nrf24l01-stop-state</link><description>Dear Nordic Semi, I play with NRF24L01+ shield and, what I control using STM32F411RE or ADuCM4050. Once a while, NRF24L01+ chip stops and on the MISO line with permanent 0xFF value. To be precise, each SPI transaction NRF24L01+ should return content of</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 23 Aug 2018 18:41:55 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/37741/nrf24l01-stop-state" /><item><title>RE: NRF24L01+ STOP STATE</title><link>https://devzone.nordicsemi.com/thread/145569?ContentTypeID=1</link><pubDate>Thu, 23 Aug 2018 18:41:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c750144b-2e8a-4624-8651-a8f2563039b9</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;You should use a 100ms delay after power ON before you read and write to the nRF24L01. You may also try to pull CE low and write 0 the PWR_UP bit in the config register. Other than that I don&amp;#39;t have any good suggestion, since I have not heard of this situation before. I guess it&amp;#39;s always a possibility to control VDD through a transistor to power cycle the nRF24L01 from the MCU to recover also.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>