nRF52832-CIAA HDI PCB layout tips

RE: nRF52832-CIAA HDI PCB layout tips

Andreas — Wed, 05 Sep 2018 11:53:53 GMT

Hi,

It should not be less narrow than the opening in the 'opening' for the coplanar center conductor in the top layer, width of trace + 2*spacing. It can be wider if you need for some reason, but if more narrow you risk it changing CPW properties. Then it could be better to just omit the internal keepout entirely. As mentioned you will then need to reduce trace/spacing dimensions to raise the impedance, but at least you know what you are dealing with, and you might not consider the possible performance hit as critical anyway.

Best regards,

Andreas

RE: nRF52832-CIAA HDI PCB layout tips

Sumpli7 — Wed, 05 Sep 2018 06:29:06 GMT

Thank you. One more thing. If we use layer 4 as reference, how wide keepouts must be on inner layers under antenna trace? If antenna trace on top layer is for example 10mils?

RE: nRF52832-CIAA HDI PCB layout tips

Sumpli7 — Wed, 05 Sep 2018 06:15:06 GMT

Thank you. This helps a lot to go forward.

RE: nRF52832-CIAA HDI PCB layout tips

AmbystomaLabs — Tue, 04 Sep 2018 17:06:43 GMT

The big reason for the keepout is that HDI boards normally have about a 3 mil outer layer dielectric with a big core. The dielectric needs to be thin so the laser can burn through. With 3 mil and a healthy trace to ground pour spacing even a 10 mil trace will give a 33ohm characteristic impedance.

Plus since the tolerance is normally +/- some fixed mil amount. This means board to board impedance changes will be large even it you spec a characterized board.

So, much easier and repeatable to do a ground keepout on inner layers and then use bottom as ground reference for top and traditional coplanar with ground configuration for the strip.

RE: nRF52832-CIAA HDI PCB layout tips

Andreas — Tue, 04 Sep 2018 15:19:26 GMT

Hi,

Yes, you can shrink the internal layer keepout. This of course increases deviation between the reference design and your design, increasing the likelyhood of difference in performance also. You should however always test RF performance and adjust C3/L1 accordingly. This will make up most of the performance deviation.

Using layer 2/3 as reference ground underneath the RF part can cause harmonics to increase a bit, but as mentioned this can be mitigated by tuning L1/C3. If you need to use layer 4 for routing/components, then the keepout should be removed in either Layer 2 or 3. If layer 4 is free for reference ground, then using this is recommended, but it is not critical.

Feel free to submit your design in a private case for a free review. I am not able to provide more concise feedback and recommendations without actually seeing the design.

Best regards,

Andreas