[nRF52840] I2C clock low time period failed

RE: [nRF52840] I2C clock low time period failed

Kirk Wayland — Fri, 01 Aug 2025 21:42:58 GMT

It does cause a problem with some slave devices, especially some accelerometers. It causes the SDA line to be stuck low.

RE: [nRF52840] I2C clock low time period failed

Kirk Wayland — Fri, 01 Aug 2025 21:41:54 GMT

It depends on the micro. The nRF52840 does have a frequency setting. See their errata.

RE: [nRF52840] I2C clock low time period failed

Einar Thorsrud — Wed, 12 Sep 2018 12:37:07 GMT

There is no way to adjust the timing on the clock signal. If you only see this on the first pulse after clock stretching, it may be due to erratum 149. I have not been able to find any reports of this causing problems with any I2C slaves in practice, though.

RE: [nRF52840] I2C clock low time period failed

Sheng — Wed, 12 Sep 2018 01:51:38 GMT

We using external 32 MHz crystal, HFCLK. The Open-drain pulling low or "release can be controlled by master, not sure why we can't adjust the timing on this?

RE: [nRF52840] I2C clock low time period failed

Einar Thorsrud — Tue, 11 Sep 2018 12:26:24 GMT

Hi,

There is no way to adjust this in software. I see that the minimum tLOW is 1.3 μs for Fast-mode I2C devices in the I2C spec, so I would have expected the nRF to stay within that. Which high frequency clock source do you use when you see this (RC or xtal)?