RE: With PPI does the channel interrupt need to be disabled in addition to disabling the peripheral?

haakonsh — Mon, 01 Oct 2018 08:09:09 GMT

"Would the PPI not trigger, or would the ADC being off cause a system ASSERT?"

I believe the PPI will attempt to trigger the task as normal, but the SAADC is not enabled and therefore not monitoring its task registers. I doubt an ASSERT will happen as the CPU is not involved in the operation. I believe nothing will happen.

"Assuming the ADC wouldn't assert ff PPI is enabled and the ADC is disabled. would easy DMA be off and thus reduce the current consumption?"
The EasyDMA is off when the SAADC is disabled.

"If I want to disable the ADC would the PPI channel stay intact even if the timer and the peripheral were disabled?"
Yes, I believe so. The PPI only operates on registers in RAM and not directly with the peripherals, and as RAM is always available to the PPI system it will stay operational.