how to drive spi CS line low for 32 bits.

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Mon, 04 Feb 2019 08:48:54 GMT

Hi,

Is there anything going out on the SPI lines when this occurs?

When debugging, It is recommend that you keep the optimization level low, if not; the compiler will try to find patterns in your generated code and thus the "normal flow" will not be followed.

Kind regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Thu, 31 Jan 2019 21:54:34 GMT

Hi Hakon,

The problems were endianess and also the frequency. I had to decrease the frequency according to the peripheral. I am able to communicate with the IC now. But I am facing another problem now.

In the attached code. I am placing the break point at every nrf_drv_spi_transfer. But it is not stopping on 2nd and last transfer. This is strange. If I change the order of transfers, the debugger will not stop at some other location. What could be causing this? Is the delay not enough to wait for the completion of previous transfer ? Is it getting stuck somewhere? Can you please have a quick look at this simple code snippet and advise. Thanks,

#define SPI_INSTANCE  0 /**< SPI instance index. */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);  /**< SPI instance. */
static volatile bool spi_xfer_done;  /**< Flag used to indicate that SPI instance completed the transfer. */


static uint32_t       config_start =  0b01111000010101100011000000000000;           //0X30H
static uint32_t       cal_start =     0b01111000010101100100000000000000; 
static uint32_t       harm_start =    0b01111000010101100110000000000000;           //0X50H
static uint32_t       adj_start =     0b01111000010101100110000000000000;           //0X60H
static uint32_t       mmode0 =        0b11000010000010000011001100000000;           //0X60H
static uint32_t       test =          0b0011000010000000;
static uint16_t       urmsA =         0b1101100110000000;                           //0XBCH
static uint16_t       urmsB =         0b1101101010000000;                           //0XBCH
static uint16_t       urmsC =         0b1101101110000000;                           //0XBCH
static uint16_t       irmsA =         0b1101110110000000;                           //0XBCH
static uint16_t       irmsB =         0b1101111010000000;                           //0XBCH
static uint16_t       irmsC =         0b1101111110000000;                           //0XBCH
static uint32_t       uoffsetA =      0b00000000000000000110001100000000;           //0X60H
static uint32_t       uoffsetB =      0b00000000000000000110011100000000;           //0X60H
static uint32_t       uoffsetC =      0b00000000000000000110101100000000;           //0X60H
static uint32_t       ioffsetA =      0b00000000000000000110100000000000;           //0X60H
static uint32_t       ioffsetB =      0b00000000000000000110110000000000;           //0X60H
static uint32_t       ioffsetC =      0b00000000000000000110110000000000;           //0X60H
static uint32_t       igainA =        {0x30, 0x75, 0x62, 0x00};                     //0X60H
static uint32_t       igainA_r =      0b00110000011101010110001000000000;                   //0X60H
           //0X30H
 

static uint8_t       m_rx_buf[4];                                               /**< RX buffer. */
static const uint8_t  m_length = 4;                                            /**< Transfer length. */

/**
 * @brief SPI user event handler.
 * @param event
 */



void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    spi_xfer_done = true;
    NRF_LOG_INFO("Transfer completed.");
    if (m_rx_buf[0] != 0)
    {
        NRF_LOG_INFO(" Received:");
        NRF_LOG_HEXDUMP_INFO(m_rx_buf, strlen((const char *)m_rx_buf));
    }
}

int main(void)
{
    bsp_board_init(BSP_INIT_LEDS);

    APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
    NRF_LOG_DEFAULT_BACKENDS_INIT();

        nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config.ss_pin   = 47 ;
        spi_config.miso_pin = 43;
        spi_config.mosi_pin = 46;
        spi_config.sck_pin  = 42;
        spi_config.mode = NRF_DRV_SPI_MODE_0;
        spi_config.frequency = NRF_DRV_SPI_FREQ_1M;
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL));

        NRF_LOG_INFO("SPI example started.");


                       

        while(1){
      
        memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &config_start, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);  

          memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &cal_start, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);

         memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &harm_start, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);

         memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &adj_start, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);

         memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &igainA_r, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);

        memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &irmsA, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(0);
        nrf_delay_ms(200);
    
}
}

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Mon, 07 Jan 2019 08:00:04 GMT

rx_buffer should be equal (or larger) to the length that you are receiving.

Declare it like this:

static uint8_t m_rx_buf[4];

The salaea logic analyzer trace shows that your send buffer and the actual byte endianess on the bus does not correspond, as the READ bit is not set.

Could you try setting your transfer buffer like this and see if the sensor responds?

uint8_t m_tx_buf4[] = {0x80, 0x30};

Kind regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Fri, 04 Jan 2019 15:24:33 GMT

Hi Hakon,

So my rxbuffer sjould be of 4 bytes, right? rx_buffer[4]. Is it a violation or i can directly increase the size?

Switching mode is not required as suggested by MICROCHIP. All transactions will happen using single mode only.

Thanks

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Fri, 04 Jan 2019 08:46:19 GMT

Hi,

1. You are overflowing your buffer (m_rx_buffer) by 2 bytes, as the buffer is declared as 2 byte and you are receiving 4 bytes. This is _very crucial_ that you fix.

2. You are no longer switching SPI mode as per the spec for the sensor you are communicating with.

Best regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Fri, 04 Jan 2019 03:49:32 GMT

Hi Hakon,

I am still struggling to produce correct SPI timings . Below is the actual SPI timing sent to me by an Application Engineer from MICROCHIP. I need to replicate the same using nrf52840 chip :

I am getting these SPI timings using the same operation as in above image through nrf52840 chip .

Can you identify what is going wrong with my attached firmware ????

Any kind of help or suggestion will be appreciated . We are really running late now on our project .

#include "nrf_drv_spi.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#include "nrf_delay.h"
#include "boards.h"
#include "app_error.h"
#include <string.h>
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"

#define SPI_INSTANCE  0 /**< SPI instance index. */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);  /**< SPI instance. */
static volatile bool spi_xfer_done;  /**< Flag used to indicate that SPI instance completed the transfer. */


static uint16_t       m_tx_buf4= 0b1000000000110000;    //0X30H
static uint16_t       m_tx_buf5= 0b0000000000000000;
 

static uint8_t       m_rx_buf[2];    /**< RX buffer. */
static const uint8_t  m_length = 4;        /**< Transfer length. */

/**
 * @brief SPI user event handler.
 * @param event
 */



void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    spi_xfer_done = true;
    NRF_LOG_INFO("Transfer completed.");
    if (m_rx_buf[0] != 0)
    {
        NRF_LOG_INFO(" Received:");
        NRF_LOG_HEXDUMP_INFO(m_rx_buf, strlen((const char *)m_rx_buf));
    }
}

int main(void)
{
    bsp_board_init(BSP_INIT_LEDS);

    APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
    NRF_LOG_DEFAULT_BACKENDS_INIT();

        nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config.ss_pin   = SPI_SS_PIN;
        spi_config.miso_pin = SPI_MISO_PIN;
        spi_config.mosi_pin = SPI_MOSI_PIN;
        spi_config.sck_pin  = SPI_SCK_PIN;
        spi_config.mode = NRF_DRV_SPI_MODE_0;
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL));

        NRF_LOG_INFO("SPI example started.");

        while(1){

        memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;
       
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf4, m_length, m_rx_buf, m_length));
        
              while (!spi_xfer_done)
        {
            __WFE();
        }

        NRF_LOG_FLUSH();


        bsp_board_led_invert(3);
        nrf_delay_ms(200);  

      }
    
}

Thanks,

Arshdeep

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Wed, 02 Jan 2019 08:57:42 GMT

Hi,

I am sorry for the late reply.

You cannot enable pull up on a gpio configured as output. If you need a pull-resistor on a GPIO configured as output, you can either set the level (1 or 0), or add an external pull-resistor.

Kind regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Wed, 19 Dec 2018 08:43:54 GMT

Hi Hakon,

I need to enable pull ups on SPI lines. Datasheet of IC recommends to use 10K pull up resistors on SPI lines . How can I enable internal pull ups on SPI lines ? I have used nrf_gpio_cfg_output API to enable PULL UPS by changing its definition in nrf_gpio.h like this :

__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
{
    nrf_gpio_cfg(
        pin_number,
        NRF_GPIO_PIN_DIR_OUTPUT,
        NRF_GPIO_PIN_INPUT_DISCONNECT,
        NRF_GPIO_PIN_PULLUP,
        NRF_GPIO_PIN_S0S1,
        NRF_GPIO_PIN_NOSENSE);
}

Is this the right way to do so or there is any other better way also??

/**
 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
 * 
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 * 
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 * 
 * 2. Redistributions in binary form, except as embedded into a Nordic
 *    Semiconductor ASA integrated circuit in a product or a software update for
 *    such product, must reproduce the above copyright notice, this list of
 *    conditions and the following disclaimer in the documentation and/or other
 *    materials provided with the distribution.
 * 
 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 * 
 * 4. This software, with or without modification, must only be used with a
 *    Nordic Semiconductor ASA integrated circuit.
 * 
 * 5. Any software provided in binary form under this license must not be reverse
 *    engineered, decompiled, modified and/or disassembled.
 * 
 * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 */
#include "nrf_drv_spi.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#include "nrf_delay.h"
#include "boards.h"
#include "app_error.h"
#include <string.h>
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"

#define SPI_INSTANCE  0 /**< SPI instance index. */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);  /**< SPI instance. */
static volatile bool spi_xfer_done;  /**< Flag used to indicate that SPI instance completed the transfer. */


static uint32_t       m_tx_buf4= 0b10000000001100000000000000000000;    //0X80BC
//static uint16_t       m_tx_buf5= 0b;
 
 



static uint16_t       m_rx_buf1[2];    /**< RX buffer. */
static const uint8_t  m_length1 = 4;        /**< Transfer length. */

/**
 * @brief SPI user event handler.
 * @param event
 */



void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    spi_xfer_done = true;
    NRF_LOG_INFO("Transfer completed.");
    if (m_rx_buf1[0] != 0)
    {
        NRF_LOG_INFO(" Received:");
        NRF_LOG_HEXDUMP_INFO(m_rx_buf1, strlen((const char *)m_rx_buf1));
    }
}

int main(void)
{
        bsp_board_init(BSP_INIT_LEDS);

        APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
        NRF_LOG_DEFAULT_BACKENDS_INIT();



        nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config.ss_pin   = SPI_SS_PIN;
        spi_config.miso_pin = SPI_MISO_PIN;
        spi_config.mosi_pin = SPI_MOSI_PIN;
        spi_config.sck_pin  = SPI_SCK_PIN;
        spi_config.mode = NRF_DRV_SPI_MODE_2;

        nrf_gpio_cfg_output(SPI_SS_PIN);
        nrf_gpio_cfg_input(SPI_MISO_PIN, NRF_GPIO_PIN_PULLUP);
        nrf_gpio_cfg_output(SPI_MOSI_PIN);
        nrf_gpio_cfg_output(SPI_SCK_PIN);
        
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL));

       NRF_LOG_INFO("SPI example started.");

        memset(m_rx_buf1, 0, m_length1);
        spi_xfer_done = false;

          //Send 80H to BCH to read power factor from BCH register
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf4, m_length1, m_rx_buf1, m_length1));
          
         while (!spi_xfer_done)
        {
            __WFE();
        }

        
      
        NRF_LOG_FLUSH();
        bsp_board_led_invert(3);
        nrf_delay_ms(200);


      
      //  memset(m_rx_buf1, 0, m_length1);
      //  spi_xfer_done = false;
       // APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf5, m_length1, m_rx_buf1, m_length1));
          
      //    while (!spi_xfer_done)
      //  {
      //      __WFE();
      //  }

      //  NRF_LOG_FLUSH();
      //  bsp_board_led_invert(2);
      //  nrf_delay_ms(200);

   }

Thanks,

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Mon, 03 Dec 2018 09:43:44 GMT

Hi,

You are not waiting for the SPI transfer to be finished (missing while(!spi_xfer_done)).

Since you initialize the SPI driver with a spi_handler set, this will set the driver into non-blocking mode. If you want blocking mode, set the handler to NULL when initializing the driver.

Kind regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Sat, 01 Dec 2018 22:13:04 GMT

Hi Hakan,

Unfortunately I have access to only one channel oscilloscope for now. Have ordered one with 4 channels.

I have reduced the code base just to see the mode switch. I can only see a consistent 16bit clock with no delay as described in this attached picture.

The code does not work as expected .

        nrf_drv_spi_config_t spi_config1 = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config1.ss_pin   = NRF_DRV_SPI_PIN_NOT_USED;
        spi_config1.miso_pin = SPI_MISO_PIN;
        spi_config1.mosi_pin = SPI_MOSI_PIN;
        spi_config1.sck_pin  = SPI_SCK_PIN;
        spi_config1.mode = NRF_DRV_SPI_MODE_2;
     //   APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler1, NULL));

        nrf_drv_spi_config_t spi_config2 = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config2.ss_pin   = NRF_DRV_SPI_PIN_NOT_USED;
        spi_config2.miso_pin = SPI_MISO_PIN;
        spi_config2.mosi_pin = SPI_MOSI_PIN;
        spi_config2.sck_pin  = SPI_SCK_PIN;
        spi_config2.mode = NRF_DRV_SPI_MODE_3;
     //   APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler1, NULL));

       nrf_gpio_cfg_output(29);

    NRF_LOG_INFO("SPI example started.");



  
        while(1){

        //initialize with spi config 1
      
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config1, spi_event_handler, NULL));
        

        memset(m_rx_buf1, 0, m_length1);
        spi_xfer_done = false;
        //clear CS line
        nrf_gpio_pin_clear(29);
        //Send 80H to BCH to read power factor from BCH register
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf4, m_length1, m_rx_buf1, m_length1));
        NRF_LOG_FLUSH();
        bsp_board_led_invert(3);
       nrf_delay_ms(200);

        nrf_drv_spi_uninit(&spi);
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config2, spi_event_handler, NULL));
          memset(m_rx_buf1, 0, m_length1);
        spi_xfer_done = false;
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf5, m_length1, m_rx_buf1, m_length1));
        NRF_LOG_FLUSH();
        bsp_board_led_invert(2);
        nrf_delay_ms(200);

        //set CS pin high again
        nrf_gpio_pin_set(29);
         
          nrf_drv_spi_uninit(&spi);


        

        }


        
}

Thanks,

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Thu, 29 Nov 2018 09:45:11 GMT

This looks like only one part of the SPI communication, the first 16 bits, where you lack the mode switch over to the last 16 bit transfer. Do you have access to a logic analyzer/oscilloscope with 4 channels, so that you can sample all lines simultaneously?

RE: how to drive spi CS line low for 32 bits.

arshdeep — Tue, 27 Nov 2018 15:00:49 GMT

MISO LINE

CS LINE

SCK LINE

MOSI LINE

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Tue, 27 Nov 2018 11:13:32 GMT

Hi,

Are you able to scope all SPI lines, so that we're able to see that the mode is successfully changed when reading the response from the device?

Kind regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Tue, 27 Nov 2018 03:53:41 GMT

Hi, I talked to the manufacturer. He asked me to check the SPI timings by doing a simple read operation on register 0x30 . I should be reading 0x6886 but i am reading 0Xffff instead. May be because of the pull up resistors on SPI pins ???

It is a very small code base . I will be glad if you could verify for me if the code is right

#include "nrf_drv_spi.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#include "nrf_delay.h"
#include "boards.h"
#include "app_error.h"
#include <string.h>
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"

#define SPI_INSTANCE  0 /**< SPI instance index. */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);  /**< SPI instance. */
static volatile bool spi_xfer_done;  /**< Flag used to indicate that SPI instance completed the transfer. */


static uint16_t       m_tx_buf4= 0b1000000000110000;    //0X80BC
static uint16_t       m_tx_buf5= 0b0000000000000000;
 
 



static uint16_t       m_rx_buf1[1];    /**< RX buffer. */
static const uint8_t  m_length1 = 2;        /**< Transfer length. */

/**
 * @brief SPI user event handler.
 * @param event
 */



void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    spi_xfer_done = true;
    NRF_LOG_INFO("Transfer completed.");
    if (m_rx_buf1[0] != 0)
    {
        NRF_LOG_INFO(" Received:");
        NRF_LOG_HEXDUMP_INFO(m_rx_buf1, strlen((const char *)m_rx_buf1));
    }
}

int main(void)
{
    bsp_board_init(BSP_INIT_LEDS);

    APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
    NRF_LOG_DEFAULT_BACKENDS_INIT();



        nrf_drv_spi_config_t spi_config1 = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config1.ss_pin   = NRF_DRV_SPI_PIN_NOT_USED;
        spi_config1.miso_pin = SPI_MISO_PIN;
        spi_config1.mosi_pin = SPI_MOSI_PIN;
        spi_config1.sck_pin  = SPI_SCK_PIN;
        spi_config1.mode = NRF_DRV_SPI_MODE_2;
     //   APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler1, NULL));

        nrf_drv_spi_config_t spi_config2 = NRF_DRV_SPI_DEFAULT_CONFIG;
        spi_config2.ss_pin   = NRF_DRV_SPI_PIN_NOT_USED;
        spi_config2.miso_pin = SPI_MISO_PIN;
        spi_config2.mosi_pin = SPI_MOSI_PIN;
        spi_config2.sck_pin  = SPI_SCK_PIN;
        spi_config2.mode = NRF_DRV_SPI_MODE_3;
     //   APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler1, NULL));

       nrf_gpio_cfg_output(29);

    NRF_LOG_INFO("SPI example started.");



  
        while(1){

        //initialize with spi config 1
      
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config1, spi_event_handler, NULL));
        

        memset(m_rx_buf1, 0, m_length1);
        spi_xfer_done = false;
        //clear CS line
        nrf_gpio_pin_clear(29);
        //Send 80H to BCH to read power factor from BCH register
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf4, m_length1, m_rx_buf1, m_length1));
        NRF_LOG_FLUSH();
        bsp_board_led_invert(3);
        nrf_delay_ms(200);

        nrf_drv_spi_uninit(&spi);
        APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config2, spi_event_handler, NULL));
          memset(m_rx_buf1, 0, m_length1);
        spi_xfer_done = false;
        APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf5, m_length1, m_rx_buf1, m_length1));
        NRF_LOG_FLUSH();
        bsp_board_led_invert(2);
        nrf_delay_ms(200);

        //set CS pin high again
        nrf_gpio_pin_set(29);
         
          nrf_drv_spi_uninit(&spi);


        

        }


        
}

or not .

I am also attaching the O'scope diagrams of CLK and MOSI line .

devzone.nordicsemi.com/.../5277.Atmel_2D00_46004_2D00_SE_2D00_M90E36A_2D00_Datasheet.pdf

Thanks,

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Tue, 20 Nov 2018 08:29:19 GMT

If GPIO 29 is your CSN, then it looks to be handled correctly. The delay calls are redundant, and can be removed.

Are you able to communicate with the device? How does the scoped signals look?

RE: how to drive spi CS line low for 32 bits.

arshdeep — Mon, 19 Nov 2018 15:31:32 GMT

is this the correct implementation ?

nrf_drv_spi_uninit(&spi);

nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED;
spi_config.miso_pin = SPI_MISO_PIN;
spi_config.mosi_pin = SPI_MOSI_PIN;
spi_config.sck_pin = SPI_SCK_PIN;
spi_config.mode = NRF_DRV_SPI_MODE_2;
APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL));

nrf_gpio_cfg_output(29);
nrf_gpio_pin_clear(29);

memset(m_rx_buf, 0, m_length);
spi_xfer_done = false;
APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf4, m_length1, m_rx_buf, m_length1));
NRF_LOG_FLUSH();
bsp_board_led_invert(3);
// nrf_gpio_pin_set(BSP_BOARD_LED_0);
nrf_delay_ms(200);

nrf_drv_spi_uninit(&spi);

nrf_drv_spi_config_t spi_config1 = NRF_DRV_SPI_DEFAULT_CONFIG;
spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED;
spi_config.miso_pin = SPI_MISO_PIN;
spi_config.mosi_pin = SPI_MOSI_PIN;
spi_config.sck_pin = SPI_SCK_PIN;
spi_config.mode = NRF_DRV_SPI_MODE_3;
APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config1, spi_event_handler, NULL));


nrf_gpio_pin_clear(29);

memset(m_rx_buf, 0, m_length);
spi_xfer_done = false;
APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &m_tx_buf5, m_length1, m_rx_buf, m_length1));
NRF_LOG_FLUSH();
bsp_board_led_invert(3);
// nrf_gpio_pin_set(BSP_BOARD_LED_0);
nrf_delay_ms(200);

nrf_gpio_pin_set(29);

RE: how to drive spi CS line low for 32 bits.

Håkon Alseth — Mon, 19 Nov 2018 14:25:56 GMT

Hi,

The "nrf_drv_spi_transfer" function will set the CSN active prior to the first byte written. If you require the CSN pin to be kept low (ie: active), then you need to manually control the GPIO. This is done by setting "spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED", then controlling it manually in your own transfer function.

Best regards,

Håkon

RE: how to drive spi CS line low for 32 bits.

arshdeep — Mon, 19 Nov 2018 00:19:28 GMT

Thanks Einar for the explanation,

Is this the correct implementation to achieve what you showed in the diagram above ?

nrf_drv_spi_transfer (spi, first 16bit data, 2, first 16bit data, 2);

unint spi

spi mode-> 3

nrf_drv_spi_transfer (spi, last 16bit data, 2, last 16bit data, 2);

I am just confused with the length parameter. if I am specifying 2 bytes of length, will that mean that the CS line will go high after writing 2 bytes ? if that is true, then this implementation will obviously not work.

Regards,

RE: how to drive spi CS line low for 32 bits.

Einar Thorsrud — Fri, 16 Nov 2018 09:19:39 GMT

Hi,

You cannot switch mode just like that. However, I would assume that the slave device would not matter that there is a delay between the first 16 and last 16 bits, as the clock is anyway generated by the master. The idea is that after transmitting the first 16 bits you initialize the driver to use another mode and receives the 16 bits. It would stretch the transaction so that it looks something like this:

RE: how to drive spi CS line low for 32 bits.

arshdeep — Thu, 15 Nov 2018 15:42:41 GMT

Hi Einar,

Yes, I got that one but I am not sure where to start uninitializing and re-initialize the SPI with new configuration. If you see the attached read sequence. I have to write first 16bits in mode 2 and then receive 16bits in SPI mode 3. And it should not be 2 different 16 bits transaction , instead one 32 bits transaction. How can I achieve this ?

RE: how to drive spi CS line low for 32 bits.

Einar Thorsrud — Thu, 15 Nov 2018 09:29:18 GMT

Hi,

To reinitialize you have to uninitialize the driver using nrf_drv_spi_uninit() then initialize it again with nrf_drv_spi_init() with the new configuration.

Br,

Einar

RE: how to drive spi CS line low for 32 bits.

arshdeep — Wed, 14 Nov 2018 17:02:27 GMT

Hi Einar,

How can I achieve this ? I want to have a 32 bit transaction but first 16bits should be on SPI mode 2 and other 16bits on SPI mode 3. How do I uninitialize and reinitialize in between the transaction ?

RE: how to drive spi CS line low for 32 bits.

Einar Thorsrud — Wed, 14 Nov 2018 14:38:50 GMT

Hi,

Yes, it seems like it uses both SPI mode 2 and 3. Essentially that means that you have to uninit and reinitialize the SPI driver with a new configuration every time you switch between read and write. I would expect that to work.

RE: how to drive spi CS line low for 32 bits.

arshdeep — Wed, 14 Nov 2018 02:20:21 GMT

Hi Einar,

One more trace of when I send 0X00305678 / 0b00000000001100000101011001111000

RE: how to drive spi CS line low for 32 bits.

arshdeep — Mon, 12 Nov 2018 22:14:49 GMT

Hi Einar,

Thanks for helping me with this. PFA the datasheet and an image where you can read about the modes. I assume, it says the data will be shifted on SDI using SPI mode 2 and on SDO using SPI mode 3. isn't that right? So once I write the data on SDI line, would i have to uninitialize the SPI first to configure it to mode 3 or can i directly change the mode ?

Also, find attached the trace of SCK and MOSI SPI lines.

Can you figure out whats going wrong?

Appreciate it!!

devzone.nordicsemi.com/.../Atmel_2D00_46004_2D00_SE_2D00_M90E36A_2D00_Datasheet.pdf