nrf52832 spi (PSEL.SCK) timing

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Thu, 10 Jan 2019 06:53:27 GMT

hi, there is another question, after using PPI the SPI works well , but there is another question, I must put P0.30 as output pin,and there is gaps between every 8clock, If I didn't config P0.30, there is not gaps between every 8clock, just like bellow,is that right?

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Fri, 28 Dec 2018 11:20:29 GMT

hi，thanks very much

after using PPI the SPI works well , but there is another question, I must put P0.30 as output pin,and there is gaps between every 8clock, If I didn't config P0.30, there is not gaps between every 8clock, just like bellow,is that right?

RE: nrf52832 spi (PSEL.SCK) timing

MartinBL — Mon, 26 Nov 2018 10:55:25 GMT

Shorts are a type PPI and the entire purpose of shorts and PPI is to physically connect a task and event in HW so that the event can trigger the task autonomously without waiting for the CPU. Hence, when you use shorts, no amount of nops are going to delay the next transfers. The END event will trigger the START task automatically right away.

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Mon, 26 Nov 2018 09:39:48 GMT

hi, when I use short in SPI，can I change the gaps between each 8 clock using "nop" , like bellow:

In fact , the gaps didn't change if there have or not have "nop"，so, how can I change the gaps between each 8 clock when I use NRF_SPIM0->SHORTS = SPIM_SHORTS_END_START_Msk; in SPI.

RE: nrf52832 spi (PSEL.SCK) timing

MartinBL — Tue, 20 Nov 2018 14:04:11 GMT

That sounds like Erratum #58. You will find a workaround here: [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Tue, 20 Nov 2018 11:55:58 GMT

Thanks

another question, when I use NRF_SPIM0->TXD.MAXCNT = 1 , the transmission is right. when I use transmission & NRF_SPIM0->RXD.MAXCNT = 1, the SPI_SCK is wrong, sometimes 8 Clock but sometimes 16 Clock, where is the matter? My code is like bellow:

the sck is like bellow,and csn is high befor clock finish :

RE: nrf52832 spi (PSEL.SCK) timing

MartinBL — Tue, 20 Nov 2018 09:26:30 GMT

Hi,

Unfortunately the SPI peripheral simply isn't designed to do what you want it to do. Using shorts as you suggest is probably the best way to go, but even then there will be signal propagation delays, etc. and implementing delays less than 100 ns is not possible.

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Mon, 19 Nov 2018 00:58:21 GMT

when I use NRF_SPIM0->SHORTS in order to cut short the time between bytes, but it still has 1.4us，I need the time to be less than 100ns?

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Fri, 16 Nov 2018 06:39:25 GMT

Now I use NRF_SPIM0->SHORTS in order to cut short the time between bytes, but it still has 1.4us，I need the time to be less than 100ns?

RE: nrf52832 spi (PSEL.SCK) timing

yanli_1226 — Fri, 16 Nov 2018 03:46:27 GMT

Thanks.

when I send 1 byte long buffer at a time without delay, the gaps between bytes are 2.2us, I only want the gaps time to be less than 10ns. there is my code bellow, how can I get the gaps between bytes less than 100ns?

RE: nrf52832 spi (PSEL.SCK) timing

MartinBL — Thu, 15 Nov 2018 12:37:03 GMT

Hi,

The whole point of EasyDMA and the ability to specify a buffer of a arbitrary length is to be able to transfer the entire buffer without CPU intervention or delays. If you need delays between every single byte, you will have to send 1 byte long buffers one at the time and make your delay in software.