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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>[NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/4064/nrf51-uart-lock-up-at-921600-bps</link><description>Hi, 
 We have an issue with app_uart_fifo which occasionally locks up during data transfer from NRF51 to an other uC. 
 System description: 
 We&amp;#39;re using first revision chip (QFAAC0) and the UART don&amp;#39;t use hardware flow control (PCB is ready without</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 17 Oct 2014 10:17:14 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/4064/nrf51-uart-lock-up-at-921600-bps" /><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14575?ContentTypeID=1</link><pubDate>Fri, 17 Oct 2014 10:17:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d3a1ef71-9b6b-4e2f-b63a-11f38f61e3ac</guid><dc:creator>Krzysztof Rosinski</dc:creator><description>&lt;p&gt;Hi, I&amp;#39;ll run the firmware during the weekend to catch this problem,- we&amp;#39;ve decided to use 460800 bps in the current project and we&amp;#39;re now moving it forward.&lt;/p&gt;
&lt;p&gt;For me it seems like there is some issue with TXDRDY interrupt, which for some reason stops to occur, the program fills up tx fifo and software locks up in the app_uart_put function.&lt;/p&gt;
&lt;p&gt;We&amp;#39;re using BLE 120 softdevice alongside UART, 75 notifications per second and 1 write per second.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14574?ContentTypeID=1</link><pubDate>Thu, 16 Oct 2014 13:13:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cbdc8f99-34b5-476a-8d47-1fde8c497a0a</guid><dc:creator>Asbj&amp;#248;rn</dc:creator><description>&lt;p&gt;It sounds like it repeats itself at fairly constant time intervals. Do you miss any RXDRDY events from the UART similar to what @John is stating below here? Are you checking the received data and possibly the order of it?&lt;/p&gt;
&lt;p&gt;Are you using the UART alongside using a BLE softdevice?&lt;/p&gt;
&lt;p&gt;The lock up in app_uart_put() seems to indicate the the app_uart_states is not UART_READY. Are you able to read out which state the uart is is when it locks up?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14573?ContentTypeID=1</link><pubDate>Tue, 14 Oct 2014 07:39:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:056bcbfa-e1bb-46cf-abf2-b19adbe41584</guid><dc:creator>Krzysztof Rosinski</dc:creator><description>&lt;p&gt;Asbjørn,&lt;/p&gt;
&lt;p&gt;Just to confirm, the same issue occurs on the QFAAG0 chip,- it has locked up 18 times overnight at 921600 bps, the test duration was around 16 hours so I think it&amp;#39;s roughly the same as for the first revision chip (it locks up around every 40 minutes for the first revision). In the same time I&amp;#39;ve been testing this at 460800 bps (first revision chip) without any problem.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14577?ContentTypeID=1</link><pubDate>Mon, 13 Oct 2014 15:32:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fe59a4b2-28f0-40a2-9655-e56ebcd6ca42</guid><dc:creator>John</dc:creator><description>&lt;p&gt;I had a similar lockup problem with the UART in the early stage of my project. It turned out I was clearing NRF_UART0-&amp;gt;EVENTS_RXDRDY after reading the character out of the RXD register. This opened a very small window where another character could be added to the RXD register before I cleared NRF_UART0-&amp;gt;EVENTS_RXDRDY. So when I did clear NRF_UART0-&amp;gt;EVENTS_RXDRDY I was clearing the event for the second character. Simple solution was to clear NRF_UART0-&amp;gt;EVENTS_RXDRDY before reading the character out of RXD. The faster the UART baud rate the more likely you are to see this problem I think.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14576?ContentTypeID=1</link><pubDate>Mon, 13 Oct 2014 13:50:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e7ed4756-4119-4320-849f-3d0ca88bc566</guid><dc:creator>Krzysztof Rosinski</dc:creator><description>&lt;p&gt;Hi Asbjørn,&lt;/p&gt;
&lt;p&gt;Thank you for quick reply.&lt;/p&gt;
&lt;p&gt;We&amp;#39;ve replaced chip to QFAAG0 and I&amp;#39;m now going to run long term test at 921600 bps (still without hardware flow control) though.&lt;/p&gt;
&lt;p&gt;Regarding the first revision chips, I understand that these have only 2 bytes buffers but I&amp;#39;d thought that a byte should be simply overwritten in that buffer so transmission is corrupted (and this happens quite frequently). I don&amp;#39;t understand however how it is possible that the the fifo fails completely and that it fails only for the transmission from NRF51 chip. The reception interrupts still occurs even though the code locks up in the fputc function.&lt;/p&gt;
&lt;p&gt;Can you give me any hint regarding this, please?&lt;/p&gt;
&lt;p&gt;Update 18/10/14:&lt;/p&gt;
&lt;p&gt;I&amp;#39;ve caught the lock up in the debugger, this is what have so far:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;m_current_state is set to UART_ON however the EVENTS_TXDRDY interrupt doesn&amp;#39;t occur, due to that state doesn&amp;#39;t change to UART_READY, the software fifo fills up and lock up occurs.&lt;/li&gt;
&lt;li&gt;NRF_UART0-&amp;gt;TASKS_STARTTX = 0&lt;/li&gt;
&lt;li&gt;NRF_UART0-&amp;gt;TASKS_STOPTX = 0&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Many thanks,
Krzysztof Rosinski&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [NRF51] UART lock up at 921600 bps</title><link>https://devzone.nordicsemi.com/thread/14572?ContentTypeID=1</link><pubDate>Mon, 13 Oct 2014 10:29:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:22167817-e807-48a2-8baa-88e91c97a4ae</guid><dc:creator>Asbj&amp;#248;rn</dc:creator><description>&lt;p&gt;You have the first revision of the nRF51 chip and this only had receive buffers of 2 bytes. This was increased to 6 bytes in the second revision (QFAAG0) of the chip. It sounds to me like you are pushing/receiving data faster than what you are able to read out of the receive buffer and hence it goes full and it falls apart. Do you have a kit with the second revision of the chip available? I would recommend you to try your code on a kit with QFAAG0.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.nordicsemi.com/eng/nordic/download_resource/24631/4/73774160"&gt;Link to Product change notification regarding increase from 2 to 6 bytes of receiver buffer.&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>