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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/40668/nrf52832-sdk15-2-multiple-spi-devices-one-legacy-the-other-nrfx</link><description>Using an nRF52832 with SDK15.2 can I have multiple SPI devices; 
 one with DMA and one without DMA? 
 And can one instance be of legacy type (nrf_drv_spi) and the other be of new nrfx type?</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 27 Nov 2018 08:28:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/40668/nrf52832-sdk15-2-multiple-spi-devices-one-legacy-the-other-nrfx" /><item><title>RE: nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/thread/159164?ContentTypeID=1</link><pubDate>Tue, 27 Nov 2018 08:28:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ba5cc4da-c8d6-40ce-8a4d-55a610969720</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Hi Wayne, do you mean a delay between the TX and RX or a delay between each byte sent from the nRF52832? The timing between each byte is determined by the SPI hardware, i.e.&amp;nbsp;&lt;a title="  Serial Peripheral Interface Master (SPIM) timing specifications  " href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/spim.html?cp=2_1_0_30_6_1#unique_1187934831"&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;Serial Peripheral Interface Master (SPIM) timing specifications&lt;/a&gt;. I do not think that you can alter this.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;Why do you need to add a delay?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/thread/159105?ContentTypeID=1</link><pubDate>Mon, 26 Nov 2018 17:24:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:42888073-6cf7-4647-b26a-2210bc471962</guid><dc:creator>W9</dc:creator><description>&lt;p&gt;Hi Bjorn-this helped with part of the issue. NOW we can see that what we really need is to be able to insert some amount of delay between bytes that we send (and hence) bytes that we receive.&lt;/p&gt;
&lt;p&gt;Is there away with the 52832 that we can insert a delay between bytes? I don&amp;#39;t think it has to be a large delay, maybe 2-3 microSecs.&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Wayne&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/thread/158313?ContentTypeID=1</link><pubDate>Wed, 21 Nov 2018 08:17:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:69c104d2-c71b-4ea1-9388-e310eaedb240</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;Hi Wayne,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;this is a known issue described in&amp;nbsp;&lt;a href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.Rev2.errata/dita/errata/nRF52832/Rev2/latest/anomaly_832_58.html?cp=2_1_1_0_1_8"&gt;[58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1&lt;/a&gt;. Errata 58 also describes a workaround for this issue.&amp;nbsp;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/thread/158272?ContentTypeID=1</link><pubDate>Tue, 20 Nov 2018 21:52:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e89af509-2ba2-4667-90b6-b183c91926a3</guid><dc:creator>W9</dc:creator><description>&lt;p&gt;One of our concerns on the SPI/SPIM operation is that we have a need for a single byte transfer to read data from a slave device.&amp;nbsp; The slave expects a zero byte input (which it ignores) on this read cycle and it sends back an 8-bit data item. When we code our SPIm_trfer to a count of &amp;#39;1&amp;#39; for each of the tx &amp;amp; rx buffers, we sometimes see 2-bytes transferred on the MOSI/MISO (16 clks) and sometimes we see THREE bytes in the transfer.&lt;/p&gt;
&lt;p&gt;How do we accomplish just a single byte transfer in a SPI transaction. (For now, this is an EasyDMA transfer. We have also checked the box for Anomally_109 in the SPI portion of the SDK_config.h file)&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Wayne&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832, SDK15.2 multiple SPI devices; one legacy, the other nrfx</title><link>https://devzone.nordicsemi.com/thread/158129?ContentTypeID=1</link><pubDate>Tue, 20 Nov 2018 09:54:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f82d9cbe-a699-40fb-89e5-5b15358e0557</guid><dc:creator>bjorn-spockeli</dc:creator><description>&lt;p&gt;In SDK v15.2.0 the nrf_drv_spi API wraps the new nrfx_spim.c and&amp;nbsp;&lt;span&gt;nrfx_spi.c&lt;/span&gt;&amp;nbsp; drivers, where&amp;nbsp;&amp;nbsp;&lt;span&gt;nrfx_spim.c are used if&amp;nbsp;SPIx_USE_EASY_DMA is set to 1 in sdk_config.h and&amp;nbsp;nrfx_spi.c is used if it is set to 0.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;So if you want to use&amp;nbsp;&lt;/span&gt;&lt;span&gt;SPIM0&amp;nbsp;&lt;/span&gt;&lt;span&gt;and SPI1, i.e. one SPI interface with EasyDMA and one without, then you need to define the following in sdk_config.h&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;// &amp;lt;e&amp;gt; SPI0_ENABLED - Enable SPI0 instance
//==========================================================
#ifndef SPI0_ENABLED
#define SPI0_ENABLED 1
#endif
// &amp;lt;q&amp;gt; SPI0_USE_EASY_DMA  - Use EasyDMA
 

#ifndef SPI0_USE_EASY_DMA
#define SPI0_USE_EASY_DMA 1
#endif

// &amp;lt;/e&amp;gt;

// &amp;lt;e&amp;gt; SPI1_ENABLED - Enable SPI1 instance
//==========================================================
#ifndef SPI1_ENABLED
#define SPI1_ENABLED 1
#endif
// &amp;lt;q&amp;gt; SPI1_USE_EASY_DMA  - Use EasyDMA
 

#ifndef SPI1_USE_EASY_DMA
#define SPI1_USE_EASY_DMA 0
#endif&lt;/pre&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;We do generally recommend using the SPIM0-2 interface over the deprecated SPI0-2 interfaces in new designs, see&amp;nbsp;&lt;a title="  Instantiation  " href="http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/memory.html?cp=2_1_0_7_3#topic"&gt;Instantiation&lt;/a&gt;&amp;nbsp;in the nRF52832 Product Specification.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;/p&gt;
&lt;p&gt;Bjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>