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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to start code execution from bootloader nRF24LE1</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/41261/how-to-start-code-execution-from-bootloader-nrf24le1</link><description>Hello, 
 I am developing a bootloader on nRF24LE1. The NUPP configuration is: the first 24 pages (page 0 - 23) are set to be unprotected and the last 8 pages (bootloader) are protected. The bootloader is polling-based and uses no interrupt. 
 I would</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 10 Dec 2018 13:28:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/41261/how-to-start-code-execution-from-bootloader-nrf24le1" /><item><title>RE: How to start code execution from bootloader nRF24LE1</title><link>https://devzone.nordicsemi.com/thread/161003?ContentTypeID=1</link><pubDate>Mon, 10 Dec 2018 13:28:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5445988e-fbb5-4a6a-be80-e8a63911340c</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;So I assume you set NUPP to 24 in this case, which means the protected start from address 0x3000. This means that the last&amp;nbsp;16bytes in NV data memory have specific usage, this is address 0xFFF0-0xFFFF. By default all are &amp;#39;1&amp;#39; (in total 16*8 = 128 of &amp;#39;1&amp;#39;), but if you write 0xFFF0 to 0xFE, then there is odd number of &amp;#39;1&amp;#39; (127 of &amp;#39;1&amp;#39;), and&amp;nbsp;execution&amp;nbsp;will start from protected area.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to start code execution from bootloader nRF24LE1</title><link>https://devzone.nordicsemi.com/thread/160589?ContentTypeID=1</link><pubDate>Thu, 06 Dec 2018 13:53:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:bd47ab00-c0c1-498c-a943-a6f76ae552b0</guid><dc:creator>yaoCheng</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;what I want to do is exactly to set &amp;quot;an odd number of ones in the 16 topmost addresses&amp;quot;. I am just not sure whether I have understood this description correctly.&lt;/p&gt;
&lt;p&gt;I am modifying the value in these 16 addresses with SPI. If I understand the user manual correctly, the 16 topmost addresses are located in the last page of NV data memory, which is from &lt;strong&gt;0x47F0 to 0x47FF when accessing through SPI&lt;/strong&gt;.&lt;/p&gt;
&lt;p&gt;So is it correct to set ALL value to &amp;quot;0x01&amp;quot; in the address region from 0x47F0 to 0x47FF, or maybe I understand the address region wrong?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to start code execution from bootloader nRF24LE1</title><link>https://devzone.nordicsemi.com/thread/160584?ContentTypeID=1</link><pubDate>Thu, 06 Dec 2018 13:27:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:263b2a42-effe-46ce-9ed8-baa2a4424bf2</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;a href="http://infocenter.nordicsemi.com/pdf/nRF24LE1_PS_v1.6.pdf"&gt;http://infocenter.nordicsemi.com/pdf/nRF24LE1_PS_v1.6.pdf&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;See page 73:&lt;/p&gt;
&lt;p&gt;If you have split the flash main block in 2, the value of the STP bit in the FSR register will decide where the MCU starts code execution from. In the normal case STP is logic 0 and the code execution will start at code space address 0x0000. If STP is set to logic 1 the code execution will start from the start of the protected area. &lt;strong&gt;The STP bit is set during the reset/start up sequence and will be set to logic 1 if there are an odd number of ones in the 16 topmost addresses of the flash data memory&lt;/strong&gt;. See Figure 32.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>