nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

RE: nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

Dhara — Mon, 24 Dec 2018 13:02:19 GMT

Thanks for your prompt answers.

RE: nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

ketiljo — Fri, 21 Dec 2018 14:13:04 GMT

No, VDD is always connected to the output of REG0 and VDD is always the power supply to the device.

All components shown in the reference schematic are mandatory. If you omit some of them, you will either operate the device out of spec or it might not work at all. The ones marked N.C or "not mounted" can be removed, but all other components _must_ be in place.

RE: nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

Dhara — Fri, 21 Dec 2018 14:06:30 GMT

Hi ketiljo

Thanks for your detailed reply.. Need to know one more thing.

In high power mode, is there any provision to disable the supply drawn from VDD pins? --> If YES then can I keep the VDD pins floating?

Finally, I want to reduce the PCB footprint area so need to cut-off the extra caps. on VDD pins and passive components if not mandatory.

Thanks.

RE: nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

ketiljo — Fri, 21 Dec 2018 13:05:39 GMT

A) Se the reference schematic. The cap on VDD is needed for stability of the internal regulators that draws power _from_ VDD.

B) No, the setting in REGOUT0 refers to the output voltage of REG0. This is internally connected to VDD. Hence, the GPIO voltage is equal to VDD, always. See figure 3 and 4 here

C) It doesn't say anything about connecting a high voltage supply to VDD. This _must_ be connected to VDDH, else the device will break.

C) and D) See the schematic i A)

The info in the link is correct, please read it again.