NRF52840 SPIM3 : Hardware Chip Select Functionality / SDK Support

RE: NRF52840 SPIM3 : Hardware Chip Select Functionality / SDK Support

donbosley — Mon, 21 Jan 2019 19:23:06 GMT

Thank you for your help. I've been testing a timer and GPIOTE so that's looking like the route I'll test.

RE: NRF52840 SPIM3 : Hardware Chip Select Functionality / SDK Support

Einar Thorsrud — Mon, 21 Jan 2019 09:37:11 GMT

No, using SUSPEND/RESUME will not toggle the CS pin. There is no explicit support for what you want to do in the nRF HW or SDK, but the idea is that you can use PPI to control both SUSPEND/RESUME and a GPIOTE pin used as CS. Possibly combined with a timer or RTC as you may need a delay after toggling CS before the transaction is resumed (depending on the timing requirements of the SPI slave device).

RE: NRF52840 SPIM3 : Hardware Chip Select Functionality / SDK Support

donbosley — Mon, 21 Jan 2019 00:34:16 GMT

Will the SUSPEND / RESUME definitely hardware toggle the CS pin? Or should I plan on forking a GPIO as CS from the same PPI channel as the SUSPEND/RESUME command is coming from?

RE: NRF52840 SPIM3 : Hardware Chip Select Functionality / SDK Support

Einar Thorsrud — Fri, 18 Jan 2019 14:12:31 GMT

Hi,

1. Yes, the SPIM peripheral always use DMA. But the CPU is still needed to set up transactions and to control the CSN pin (for other instances than SPIM3). When you use very short transactions as in this case (two bytes), then there will be a lot of CPU activity.

2. Using SPIM3 CSN is handled in HW, but you still need to use the CPU to configure each transaction. Using the driver, I se no other way than configuring separate transaction for each 2 byte (16 bit) transaction. However, it might be possible to use a timer and counter with PPI to suspend the SPI transaction after every two bytes so that you can deassert and assert CSN to ready the slave for the next two bytes. From SPIM chapter in product specification:

A transaction can be suspended and resumed using the SUSPEND and RESUME tasks, receptively. When the SUSPEND task is triggered the SPI master will complete transmitting and receiving the current ongoing byte before it is suspended.