SPI AND SPIM READING ISSUES

RE: SPI AND SPIM READING ISSUES

NANDHU — Thu, 14 Feb 2019 07:30:14 GMT

SIR PLEASE REPLY

WHY WE CAN'T READ MORE THAN I BYTE USEING

"nrf_drv_spi_transfer(i_spi_address,NULL,0,&rx_bm_data[0],3)" THIS FUNCTION

BY THIS CONFIGURATION

spi_config.ss_pin = SPI_MOUSE_CSN_PIN;

THE WRITE OPERATION OF MORE THEN 2 BYTE IS GETTING PROPERLY WITH THIS FUNCTION

"nrf_drv_spi_transfer(i_spi_address,(const uint8_t *)&tx_data[0],2,&rx_data[0],2)"

BY THIS CONFIGURATION

spi_config.ss_pin = SPI_MOUSE_CSN_PIN;

RE: SPI AND SPIM READING ISSUES

NANDHU — Tue, 12 Feb 2019 06:41:43 GMT

BUT I WANT READ THE DATA IN BURST MODE . THEN ONLY THE DEVICE WORK PROPERLY.

RE: SPI AND SPIM READING ISSUES

NANDHU — Tue, 12 Feb 2019 06:38:53 GMT

RE: SPI AND SPIM READING ISSUES

NANDHU — Tue, 12 Feb 2019 06:38:22 GMT

SIR WHEN I USED SPI (NOT SPIM "SPI0_USE_EASY_DMA 0 "IN sdk_config.h) AND NORMAL READ OPERATION THE VALUES FROM ALL THREE REGISTER GETTING PROPERLY.I WILL PLACE THE CODE FOR NORMAL READ BELOW

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

uint32_t adns_reg_read(const nrf_drv_spi_t * i_spi_address,uint8_t i_reg, uint8_t *io_data)
{
uint32_t err_code;

/* Read operation. See ADNS-3530 datasheet (p.12).

A read operation, defined as data going from the ADNS-3530 Sensor to the
micro-controller, is always initiated by the micro-controller and consists
of two bytes. The first byte contains the address, is sent by the micro-controller
over MOSI, and has a "0" as its MSB to indicate data direction. The second byte
contains the data and is driven by the ADNS-3530 Sensor over MISO. The sensor outputs
MISO bits on falling edges of SCLK and samples MOSI bits on every rising edge of SCLK.

*/
uint8_t tx_data[2];
uint8_t rx_data[2];

// Reset serial port
adns_ncs_assert(i_spi_address,1); //disable ncs
adns_ncs_assert(i_spi_address,0); //enable ncs

if(i_spi_address == NULL | io_data == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}

// The MSB to "0" to indicate a read operation
tx_data[0]= i_reg & 0x7f;
tx_data[1]= 0xff; // Buffer to provide clock for rx data.

// Send the address to read
APP_ERROR_CHECK(nrf_drv_spi_transfer(i_spi_address,(const uint8_t *)&tx_data[0],1,&rx_data[0],1));

nrf_delay_us(4); // tSRAD delay

// Read the data by sending a dummy byte
APP_ERROR_CHECK(nrf_drv_spi_transfer(i_spi_address,(const uint8_t *)&tx_data[1],1,&rx_data[1],1));

adns_ncs_assert(i_spi_address,1); //disable ncs

// Return the second byte from rx_data
*io_data = rx_data[1];

return NRF_SUCCESS;
}

/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

RE: SPI AND SPIM READING ISSUES

NANDHU — Tue, 12 Feb 2019 04:16:57 GMT

sir is there any major difference between spi and spim data transfer except that easydma involvement

RE: SPI AND SPIM READING ISSUES

NANDHU — Mon, 11 Feb 2019 06:21:20 GMT

sir pls help

RE: SPI AND SPIM READING ISSUES

NANDHU — Mon, 11 Feb 2019 06:20:25 GMT

sir i changed tx_bm_dummy to NULL in second call to nrf_drv_spi_transfer, and set the tx_length parameter to 0 put datas are not getting i don't known why

RE: SPI AND SPIM READING ISSUES

NANDHU — Sat, 09 Feb 2019 10:49:30 GMT

i will try it sir

RE: SPI AND SPIM READING ISSUES

Jørgen Holmefjord — Fri, 08 Feb 2019 12:34:15 GMT

Try changing tx_bm_dummy to NULL in second call to nrf_drv_spi_transfer, and set the tx_length parameter to 0. In your current code you will write three bytes from whatever you have initialized tx_bm_dummy to (or garbage data from RAM if not initialized), to the SPI slave. The peripheral will automatically clock out dummy bytes when you do a read operation.

You say that you can only receive the data once, how do you start the transfer? Have you tried debugging the application, to see if any error codes are reported?

RE: SPI AND SPIM READING ISSUES

NANDHU — Fri, 08 Feb 2019 12:14:25 GMT

THIS IS HOW WE WANT TO READ

RE: SPI AND SPIM READING ISSUES

NANDHU — Fri, 08 Feb 2019 11:59:52 GMT

look the screen short i can get the value only once in the intial then it well not get

RE: SPI AND SPIM READING ISSUES

NANDHU — Fri, 08 Feb 2019 10:10:21 GMT

when i debugged it shows the value of all three register once then no value is reading

RE: SPI AND SPIM READING ISSUES

NANDHU — Fri, 08 Feb 2019 10:02:34 GMT

CONFIGURATION OF SPI

nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED;
spi_config.miso_pin = SPI_MOUSE_MISO_PIN;
spi_config.mosi_pin = SPI_MOUSE_MOSI_PIN;
spi_config.sck_pin = SPI_MOUSE_SCK_PIN;
spi_config.frequency = NRF_SPI_FREQ_1M;
spi_config.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
spi_config.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY;
spi_config.mode = NRF_DRV_SPI_MODE_0;
spi_config.orc = 0xFF;

err_code = nrf_drv_spi_init(&spi, &spi_config,NULL, NULL);
if(err_code != NRF_SUCCESS)
return NRF_ERROR_SPI;

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

FUNCTION FOR READING DATA IN BURST MODE

uint32_t adns_motion_burst_read(const nrf_drv_spi_t * i_spi_address , uint8_t * motion , uint8_t * deltaY , uint8_t * deltaX)
{

uint32_t err_code;

if (i_spi_address == NULL )
{
return NRF_ERROR_INVALID_PARAM;
}

uint8_t tx_bm_data;
uint8_t rx_bm_dummy; //receive buffer for dummy
uint8_t i_reg;

// Reset serial port
adns_ncs_assert(i_spi_address,1); //disable ncs
adns_ncs_assert(i_spi_address,0); //enable nc

i_reg = ADNS_REG_MOTION_BURST;
// Format for register in burstmode read
tx_bm_data = i_reg & 0x7f; // The MSB to "0" to indicate a read operation

// Write to Motion_Burst register.
APP_ERROR_CHECK(nrf_drv_spi_transfer(i_spi_address,(const uint8_t *)&tx_bm_data,1,&rx_bm_dummy,1));
*motion = rx_bm_dummy; // Execute dummy read to clear RX buffer for motion

nrf_delay_us(4); //tSRAD

//Read motion datas by Writing out a dummy data byte which will be ignored
APP_ERROR_CHECK(nrf_drv_spi_transfer(i_spi_address,(const uint8_t *)&tx_bm_dummy[0],3,&rx_bm_data[0],3));

adns_ncs_assert(i_spi_address,1); //disable ncs

*motion = rx_bm_data[0];
*deltaY = rx_bm_data[1];
*deltaX = rx_bm_data[2];

nrf_delay_us(1); //tBEXIT

return NRF_SUCCESS;
}

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

sdk_config.h

#ifndef SPI0_ENABLED
#define SPI0_ENABLED 1
#endif
// <q> SPI0_USE_EASY_DMA - Use EasyDMA

#ifndef SPI0_USE_EASY_DMA
#define SPI0_USE_EASY_DMA 0
#endif

RE: SPI AND SPIM READING ISSUES

NANDHU — Fri, 08 Feb 2019 09:38:19 GMT

SIR I CHANGED "spi_config.ss_pin = SPI_MOUSE_CSN_PIN;" TO "spi_config.sck_pin = NRF_DRV_SPI_PIN_NOT_USED;

BUT I CAN"T ABLE TO READ DATA FROM ALL 3 REGISTERS

RE: SPI AND SPIM READING ISSUES

NANDHU — Wed, 06 Feb 2019 04:08:48 GMT

thanks for your clarification i will try it

RE: SPI AND SPIM READING ISSUES

hmolesworth — Tue, 05 Feb 2019 16:46:42 GMT

Yes, I thought I made that clear. You require the following if you are manually driving NCS before and after the two transfers:

spi_config.sck_pin = NRF_DRV_SPI_PIN_NOT_USED;

This is the default, as I posted above, so you can also just remove .sck_pin in initialisation

RE: SPI AND SPIM READING ISSUES

NANDHU — Tue, 05 Feb 2019 16:36:40 GMT

pls reply sir

RE: SPI AND SPIM READING ISSUES

NANDHU — Mon, 04 Feb 2019 04:01:24 GMT

so i want to remove this "spi_config.ss_pin = SPI_MOUSE_CSN_PIN;" portion from the code then only i get correct data from burst mode read.

RE: SPI AND SPIM READING ISSUES

hmolesworth — Sat, 02 Feb 2019 16:51:10 GMT

I assume you control NCS correctly, setting low before the first of two transfers and only high after the second with the 4 uSec delay between the two transfers. However your code shows that you are also telling the nRF SPI code to take control of NCS. Here is the default setting for NCS and the handler for init:

// Starts by assuming NCS is not required

/**
 * @brief SPI master instance default configuration.
 */
#define NRF_DRV_SPI_DEFAULT_CONFIG                           \
{                                                            \
    .sck_pin      = NRF_DRV_SPI_PIN_NOT_USED,                \
    .mosi_pin     = NRF_DRV_SPI_PIN_NOT_USED,                \
    .miso_pin     = NRF_DRV_SPI_PIN_NOT_USED,                \
    .ss_pin       = NRF_DRV_SPI_PIN_NOT_USED,                \
    .irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY,         \
    .orc          = 0xFF,                                    \
    .frequency    = NRF_DRV_SPI_FREQ_4M,                     \
    .mode         = NRF_DRV_SPI_MODE_0,                      \
    .bit_order    = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST,         \
}

// Tests if NCS is not required

    // - Slave Select (optional) - output with initial value 1 (inactive).
    if (p_config->ss_pin != NRF_DRV_SPI_PIN_NOT_USED)
    {
        nrf_gpio_pin_set(p_config->ss_pin);
        nrf_gpio_cfg_output(p_config->ss_pin);
    }
    m_cb[p_instance->drv_inst_idx].ss_pin = p_config->ss_pin;

However your code shows that you are requesting the nRF SPI driver to take over NCS:

spi_config.ss_pin = SPI_MOUSE_CSN_PIN;

The nRF handler will now drive NCS low before and high after every transaction, including between the two transactions you require, for example sww nrf_drv_spi.c

static void finish_transfer(spi_control_block_t * p_cb)
{
    // If Slave Select signal is used, this is the time to deactivate it.
    if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED)
    {
        nrf_gpio_pin_set(p_cb->ss_pin);
    }

RE: SPI AND SPIM READING ISSUES

NANDHU — Sat, 02 Feb 2019 04:20:56 GMT

sir how "spi_config.ss_pin = SPI_MOUSE_CSN_PIN;" causes the SPIM driver to de-activate NCS between the first byte and the next 3 bytes, which terminates the burst transfer.

i am changeing manually NCS low before and after the transfers( and not between look at the code i posted at the beginning)

adns_ncs_assert(i_spi_address,1); //disable ncs
adns_ncs_assert(i_spi_address,0); //enable ncs

look this

RE: SPI AND SPIM READING ISSUES

hmolesworth — Mon, 28 Jan 2019 16:34:35 GMT

This is the problem, I think:

spi_config.ss_pin = SPI_MOUSE_CSN_PIN;

This causes the SPIM driver to de-activate NCS between the first byte and the next 3 bytes, which terminates the burst transfer. Change this to manually drive NCS low before and after the transfers, not between.

From the data sheet "After sending the register address, the microcontroller must wait tSRAD and then begin reading data. All data bits can be read with no delay between bytes by driving SCLK at the normal rate." tSRAD is 4uSecs, so for the "burst" read you are using the first byte is sent without removing NCS the three bytes are read in in the next SPI transfer, So send two commands and do not allow the spim handler to drive NCS and ensure there is at least 4 usec delay between 1st and second commands.

RE: SPI AND SPIM READING ISSUES

NANDHU — Mon, 28 Jan 2019 05:42:02 GMT

SPI initialization was correct and the data from sensor registers are getting when the sensor registers read separately (SPI USED NOT SPIM). If BURST MODE(SPIM IS USED) is used motion register data getting data from x and y register is not getting.

nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
spi_config.ss_pin = SPI_MOUSE_CSN_PIN;
spi_config.miso_pin = SPI_MOUSE_MISO_PIN;
spi_config.mosi_pin = SPI_MOUSE_MOSI_PIN;
spi_config.sck_pin = SPI_MOUSE_SCK_PIN;
spi_config.frequency = NRF_SPI_FREQ_1M;
spi_config.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
spi_config.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY;
spi_config.mode = NRF_DRV_SPI_MODE_0;
spi_config.orc = 0xFF;

err_code = nrf_drv_spi_init(&spi, &spi_config,NULL, NULL);
if(err_code != NRF_SUCCESS)
return NRF_ERROR_SPI;

SPI INSTANCE 0 IS USED

RE: SPI AND SPIM READING ISSUES

NANDHU — Mon, 28 Jan 2019 05:32:28 GMT

yes uint8_t rx_bm_dummy; is a single byte this byte is only used when there is a write to "Motion_Burst register" the value received in these variable has no use.

For receiving valued datas from motion register ,x_Delta register and y_Delta register i used uint8_t rx_bm_data[3]; its declared globally its not in the above code i posted.

Sir i also tried with transmit byte instead of null in this function "nrf_drv_spi_transfer(i_spi_address,NULL,0,&rx_bm_data[0],1));" call but not receiving all three datas correctly.

i can"t find out what the issue is . when reading the register data individually its getting correctly but using burst mode not receiving correctly

RE: SPI AND SPIM READING ISSUES

hmolesworth — Sun, 27 Jan 2019 20:24:43 GMT

In passing I would suggest your code will not work as NULL or 0 for tx buffer and length is not valid and will cause an assert; this is the assert trap discussed in this thread (have to keep loading more to see the that post):

    ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED);
    ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0);
    ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0);

At least 1 transmit byte is required. Typically one would read all 3 bytes in a single invocation, assuming the hardware device allows thatwhich your device may not

// Write out a dummy data byte which will be ignored and read motion data 
 APP_ERROR_CHECK(nrf_drv_spi_transfer(i_spi_address,tx_buf, 1, rx_bm_data, 3));

I haven't looked at the rest of the code, but I think it requires review; for example, this is not a buffer but a single byte:

uint8_t rx_bm_dummy; //receive buffer for dummy

This is probably the intention:

uint8_t rx_bm_dummy[3]; // 3-byte receive buffer for dummy

RE: SPI AND SPIM READING ISSUES

NANDHU — Sun, 27 Jan 2019 16:34:19 GMT

sir i answered to your question i didn"t got any replys